Abstract: A semiconductor device package is disclosed which includes inter-digitated input and output bond wires configured to increase the negative mutual inductive coupling between the wires, thus reducing the overall parasitic inductance of the device. In one embodiment, the microelectronic component includes a semiconductor device coupled to a substrate, such as a lead frame, a first set of bond wires connected to the semiconductor device for providing current flow into the semiconductor device, and a second set of bond wires that are in a current loop with the first set of bond wires and are connected to the semiconductor device for providing current flow out of the semiconductor device, wherein the first and second set of bond wires are configured in an inter-digitated pattern to increase the magnitude of mutual inductive coupling between the first and second set of bond wires.

Abstract: An optical coupler for forming an optical connection between one or more two dimensional photonic array devices and an optical fiber and for forming an electrical connection between the two dimensional photonic array devices and a substrate, a system including the optical coupler and materials, and methods of forming the optical coupler and system are disclosed. The optical coupler includes a light transmission medium and electrical connectors, which are at least partially encapsulated. In addition, the device includes alignment guides configured to receive guide pins from a fiber optic connector, such that when the fiber optic connector is attached to the optical coupler, fibers of the ribbon align with the two dimensional photonic array device(s) via the light transmission medium.

Abstract: Method and structure for securing a mold compound to a printed circuit board is disclosed. A through hole or a blind hole is fabricated in a printed circuit board adjacent to a die. The hole is then filled with a mold compound. The mold compound also surrounds and covers the die. The mold compound within the hole locks the mold compound to the surface of the printed circuit board. In one embodiment, a through hole or a blind hole is fabricated adjacent to a semiconductor die. The semiconductor die is attached to a layer of gold-plated copper on the printed circuit board. After the semiconductor die is attached to the layer of gold-plated copper on the printed circuit board, the semiconductor die is surrounded and covered by the mold compound and the fabricated hole is filled with the mold compound. The mold compound within the hole has good adhesion to the resin layer which constitutes the printed circuit board. This adhesion locks the mold compound securely to the surface of the printed circuit board.

Abstract: One disclosed embodiment comprises a substrate having a top surface for receiving two or more semiconductor dies. The disclosed embodiment further comprises a printed circuit board attached to a bottom surface of the substrate and at least one via in the substrate. The at least one via provides an electrical connection between a signal bond pad of a first semiconductor die and the printed circuit board. The at least one via provides an electrical connection between a first substrate bond pad and the printed circuit board. The first substrate bond pad is connected to the first signal bond pad of the first semiconductor die by a first signal bonding wire. The at least one via also provides an electrical connection between the first signal bond pad of the first semiconductor die and a first land that is electrically connected to the printed circuit board.

Abstract: According to an embodiment, a semiconductor die has a source bond pad and a destination bond pad attached to a top surface of the semiconductor die. A stud bump is situated on the destination bond pad. A bonding wire is then ball bonded to the source bond pad and thereafter stitch bonded to the stud bump on the destination bond pad. The bonding wire acts as an off-chip inductor or a portion of an off-chip inductor. In one embodiment a number of bonding-wires and on chip conductors are used to form an off-chip inductor. The inductance of the off-chip inductor can be adjusted or fine-tuned by adjusting a loop height of the one or more bonding wires used in the off-chip inductor. The inductance of the invention's off-chip inductor can also be adjusted by increasing or decreasing the number of bonding wires used to form the off-chip inductor.

Abstract: An optical coupler for forming an optical connection between one or more two dimensional photonic array devices and an optical fiber and for forming an electrical connection between the two dimensional photonic array devices and a substrate, a system including the optical coupler and materials, and methods of forming the optical coupler and system are disclosed. The optical coupler includes a light transmission medium and electrical connectors, which are at least partially encapsulated. In addition, the device includes alignment guides configured to receive guide pins from a fiber optic connector, such that when the fiber optic connector is attached to the optical coupler, fibers of the ribbon align with the two dimensional photonic array device(s) via the light transmission medium.

Abstract: A semiconductor device package is disclosed which includes inter-digitated input and output bond wires configured to increase the negative mutual inductive coupling between the wires, thus reducing the overall parasitic inductance of the device. In one embodiment, the microelectronic component includes a semiconductor device coupled to a substrate, such as a lead frame, a first set of bond wires connected to the semiconductor device for providing current flow into the semiconductor device, and a second set of bond wires that are in a current loop with the first set of bond wires and are connected to the semiconductor device for providing current flow out of the semiconductor device, wherein the first and second set of bond wires are configured in an inter-digitated pattern to increase the magnitude of mutual inductive coupling between the first and second set of bond wires.

Abstract: One disclosed embodiment comprises a substrate having a top surface for receiving two or more semiconductor dies. The disclosed embodiment further comprises a printed circuit board attached to a bottom surface of the substrate and at least one via in the substrate. The at least one via provides an electrical connection between a signal bond pad of a first semiconductor die and the printed circuit board. The at least one via provides an electrical connection between a first substrate bond pad and the printed circuit board. The first substrate bond pad is connected to the first signal bond pad of the first semiconductor die by a first signal bonding wire. The at least one via also provides an electrical connection between the first signal bond pad of the first semiconductor die and a first land that is electrically connected to the printed circuit board.

Abstract: In a cavity down ball grid array integrated circuit package, a metal lid is clamped and soldered to a ground ring of the top tier of the substrate of the package. During the BGA surface mount process, the back side of the metal lid is soldered to the board. This method provides grounded EMI shielding for the integrated circuit's die and bond wires, and an additional thermal path through the lid to ground, improving EMI and thermal conductivity of the package. A thermally conductive mold compound or a thermal pad can be used as the filler material between the lid and the die. The lid can be flat or contoured to the die and the die's surrounding area. Contouring of the lid reduces the distance between the lid and the die, further improving thermal conductivity of the package.