Patents by Inventor Kevin J. Stuessy

Kevin J. Stuessy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Accessing a memory using a plurality of transfers
    Patent number: 7330911
    Abstract: A method of operating a circuit, comprising the steps of (A) buffering a read signal received within a plurality of first transfers to the circuit, (B) transmitting the read signal in a second transfer from the circuit, (C) buffering a first write signal received in a third transfer to the circuit and (D) transmitting the first write signal within a plurality of fourth transfers from the circuit.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: February 12, 2008
    Assignee: LSI Logic Corporation
    Inventors: Gregory F. Hammitt, Kevin J. Stuessy
  • AMBA slave modular bus interfaces
    Patent number: 7062577
    Abstract: A circuit generally comprising a plurality of read input registers, a read output register, a write input register and a plurality of write output registers is generally disclosed. The read input registers may be configured to buffer a first read signal received within a plurality of first transfers. The read output register may be configured to transmit the first read signal in a second transfer. The write input register may be configured to buffer a first write signal received in a third transfer. The write output registers may be configured to transmit the first write signal within a plurality of fourth transfers.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: June 13, 2006
    Assignee: LSI Logic Corporation
    Inventors: Gregory F. Hammitt, Kevin J. Stuessy
  • AMBA slave modular bus interfaces
    Publication number: 20040122994
    Abstract: A circuit generally comprising a plurality of read input registers, a read output register, a write input register and a plurality of write output registers is generally disclosed. The read input registers may be configured to buffer a first read signal received within a plurality of first transfers. The read output register may be configured to transmit the first read signal in a second transfer. The write input register may be configured to buffer a first write signal received in a third transfer. The write output registers may be configured to transmit the first write signal within a plurality of fourth transfers.
    Type: Application
    Filed: December 18, 2002
    Publication date: June 24, 2004
    Applicant: LSI LOGIC CORPORATION
    Inventors: Gregory F. Hammitt, Kevin J. Stuessy