Patents by Inventor Kevin J. Yang

Kevin J. Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7262443
    Abstract: Method and apparatus for forming a semiconductor device. The method includes defining a plurality of rows in a semiconductor layer. Thereafter, on one or more of the plurality of rows, one or more bipolar junction devices are formed. Each of the bipolar junction devices has a first end region and a second end region. A quantity of a pre-amorphization ion is then implanted into at least one of the first end region and the second end region of a bipolar junction device for example. A silicide is formed in the semiconductor layer at the first end region and the second end region having implanted therein the quantity of the pre-amorphization ion. Additionally, laterally extending upper edges of the plurality of rows forming corners may be rounded prior to the implantation of the pre-amorphization.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: August 28, 2007
    Assignee: T-Ram Semiconductor Inc.
    Inventor: Kevin J. Yang
  • Patent number: 7195959
    Abstract: A thyristor-based semiconductor memory device may comprise at least a region thereof, e.g., a p-base region, having high ionization energy impurity, such as a dopant. This high ionization energy impurity within a base region may be operable to compensate for a gain-versus-temperature dependence of a constituent bipolar transistor of the thyristor element of a thyristor-based memory device. In particular embodiments, the high ionization energy impurity may include a donor and/or acceptor in silicon.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: March 27, 2007
    Assignee: T-Ram Semiconductor, Inc.
    Inventors: James D. Plummer, Zachary K. Lee, Kevin J. Yang, Farid Nemati
  • Patent number: 7078739
    Abstract: A thyristor-based memory may comprise a thyristor accessible via an access transistor. A temperature dependent bias may be applied to at least one of a supporting substrate and an electrode capacitively-coupled to a base region of the thyristor. The voltage level of the adaptive bias may change with respect to temperature and may influence and/or compensate an inherent bipolar gain of the thyristor in accordance with the change in bias and may enhance its performance and/or reliability over a range of operating temperature. In a particular embodiment, the thyristor may be formed in a layer of silicon of an SOI substrate and the adaptive bias coupled to a supporting substrate of the SOI structure.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: July 18, 2006
    Assignee: T-Ram Semiconductor, Inc.
    Inventors: Farid Nemati, Kevin J. Yang
  • Patent number: 7075122
    Abstract: In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: July 11, 2006
    Assignee: T-Ram Semiconductor, Inc.
    Inventors: Kevin J. Yang, Farid Nemati, Scott Robins, James D. Plummer, Hyun-Jin Cho
  • Patent number: 6828732
    Abstract: A fluorescent lamp end-of-life protection circuit in an illuminating electric appliance, includes a rectifying effect protection circuit for a lamp tube and an overvoltage protection circuit for the lamp tube, in which a circuitry of two series resistors and a capacitor in series is connected in parallel with the lamp tube. A cathode of a transient voltage suppresser is connected to one end of the lamp tube, its anode is connected to an anode of a diode, and a cathode of the diode is connected to a common node of two series resistors. One end of a trigger diode is connected to a common node of the capacitor and the resistor, and the other end thereof is connected to a gate terminal G of a triac, a first electrode and a second electrode of of which are connected to two ends of the lamp tube respectively.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: December 7, 2004
    Assignee: Phi Hong Electronics (Shanghai) Co., Ltd.
    Inventors: Kevin J. Yang, Haoran Zeng
  • Publication number: 20040124787
    Abstract: The present invention relates to a fluorescent lamp end-of-life protection circuit in an illuminating electric appliance. A need exists for a simple and all-sided protection circuit in view of hazard occurring at end of life of a lamp tube.
    Type: Application
    Filed: June 10, 2003
    Publication date: July 1, 2004
    Applicant: Phi Hong Electronics (Shanghai) Co., Ltd.
    Inventors: Kevin J. Yang, Haoran Zeng
  • Patent number: 6204602
    Abstract: A fluorescent lamp and ballast assembly is designed to thermally isolate a ballast circuit from the illuminated lamp and thereby reduce the heat surrounding the ballast circuit. The fluorescent lamp of the assembly is attached to a housing that reduces the heat transferred to the ballast circuit. The housing includes a bowl-shaped member, a shield, and a thermal isolation member connected between the bowl-shaped member and the shield. The bowl-shaped member is designed to hold and encircle the electronic ballast circuit, and the shield is designed to engage and secure the fluorescent lamp and attached cathode lead wires of the invention. The thermal isolation member is connected between the bowl-shaped member and the shield, and provides an air gap between the lamp and the ballast circuit.
    Type: Grant
    Filed: May 17, 1999
    Date of Patent: March 20, 2001
    Assignee: MagneTek, Inc.
    Inventors: Kevin J. Yang, Gang Wang, Zheng Zhi Zhao, Xin Li Xu