Abstract: Structures for applying a modification of Tanner's Algorithm B to decode convolutional codes and cyclic and quasi-cyclic error-correcting block codes. The structures comprise one or more parity processors and one or more update processors, wherein the parity equations for a block of code are computed by the parity processors and the reliability of each bit of the result is updated in the update processors using only one register for each bit and without storing received data past the first iteration. The modification to Tanner's Algorithm B is such that each iteration in the updating process is a function only of the results of the immediately previous iteration. A decoder structure receives data serially at a rate of one bit plus soft-decision inormation per clock cycle. The invention is applicable to decoding error-correcting codes used in digital communications.