Abstract: A timer (28) uses two output-compare timer channels to form a buffered pulse width modulator. A first register (62) and a second register are provided to store a first pulse width value and a second register (66), respectively. When the first register (62) is written to, a select control circuit (68) provides the first pulse width value stored therein to a channel input/output circuit (70). When the second register (66) is written to, the select control circuit (68) provides the second pulse width value stored therein to the channel input/output circuit (70). The select control circuit (68) provides one of the first and second pulse width values such that the signal output by the channel input/output circuit (70) is not erroneous. By writing a new pulse width value to a register associated with an unused channel, the pulse width modulation function is buffered.