Abstract: A method of forming a stacked memory module from a plurality of memory devices is provided. Each of the plurality of memory devices is modified to include a logic block for decoding a plurality of chip select signals. A first high density memory module is also provided that includes the modified memory devices and a serial presence detect device. The first high density memory module is included within an electronic system. Also, an additional method of forming a stacked memory module is provided, the method requiring modification of an address buffer to include a logic block for decoding a plurality of chip select signals. A second high density memory module is also provided that includes the modified address buffer and a serial presence detect device. The second high density memory module is included within an electronic system.

Abstract: A method of forming a stacked memory module from a plurality of memory devices is provided. Each of the plurality of memory devices is modified to include a logic block for decoding a plurality of chip select signals. A first high density memory module is also provided that includes the modified memory devices and a serial presence detect device. The first high density memory module is included within an electronic system. Also, an additional method of forming a stacked memory module is provided, the method requiring modification of an address buffer to include a logic block for decoding a plurality of chip select signals. A second high density memory module is also provided that includes the modified address buffer and a serial presence detect device. The second high density memory module is included within an electronic system.

Abstract: A high density non-volatile memory system, card, and device is described that incorporates a synchronous interface. This is accomplished through use of an external or embedded controller and/or memory buffer to manage the high density non-volatile memory device(s) to present it as a conventional memory device having a synchronous interface that is accessible by row and column address. This allows the high density non-volatile memory to support in-place code execution and allows it to be booted from. Additionally, this incorporation eliminates the overhead of drivers and/or operating system support required to utilize and present conventional high density non-volatile memory devices and moves it internal to the memory device. This simplifies the use and design effort in the overhead and specialized interfacing of high density non-volatile memories and in particular, NAND architecture Flash memories, while reducing the production cost through use of less expensive high density non-volatile memory.