Abstract: A belt system that includes an elongated strap extending between a first and second end, with a first fastener coupled to the first end and a second fastener coupled to the second end. The belt system also includes at least one adjustable length cable coupled near the first end and the second end. The cable passes through the strap at multiple pass-through points, allowing the strap to be cinched and the belt to be shortened by adjusting the cable length. The cable length can be adjusted by a dial located on the first fastener or by a cincher fixed near the first fastener, which includes a housing supporting a dowel to which the cable end is secured. The dowel can rotate in two directions, and the cincher includes a gear, a cam, and a release that allows a user to selectively disengage the cam from the gear to release the wire.

Abstract: Techniques are disclosed for the use of a hybrid architecture that combines a programmable processing array and a hardware accelerator. The hybrid architecture functions to maintain synchronization between data samples to be transmitted and a measured or observed transmission of the data samples. By comparing these blocks of data samples, DFE functions such as digital pre-distortion (DPD) parameter adaptation may be implemented. The hybrid architecture enables high flexibility at low additional cost. To further limit the costs, the programable processing array may have processing power and memory that is reduced compared to conventional processing array implementations.

Abstract: Techniques are disclosed for the use of a hybrid architecture that combines a programmable processing array and a hardware accelerator. The hybrid architecture implements a data driven synchronization process to maintain synchronization between the programmable elements (PEs) of the programmable processing array. The hybrid architecture implements a timer-based solution to ensure data-driven synchronization between the PEs of the programmable processing array meets the time-based synchronization requirements of the overall system. The timers function to introduce a delay or latency to the time required by each of the PEs of the programmable processing array to perform their respective tasks, thereby forcing the hardware blocks to wait to receive the processed data samples output via the PEs and perform their hardware-based computations.

Abstract: A tent pole bracket for use with a tent having a pole, which may comprise a body having a first end and a second end and a first side and a second side, the body including a wall defining an elongate cavity for receiving a tent pole, the cavity being open on the first end and open on the first side, and the body having a slot for receiving a strap, and methods of use thereof.

Abstract: Door mechanisms for simplified and unobstructed passage through an entranceway of a collapsible structure are disclosed. The door mechanism may include a fanning, swinging or sliding door configured to move between an open position and a closed position within the entranceway. The door mechanism may include a fastener to secure the door to the structure or to an adjacent door. The door mechanism may be provided as part of a stand-alone structure, or as a part of a structure adapted for use with other adjacent structures.

Abstract: A subscriber unit of a time division multiple access (TDMA) radiotelephone system is, from a power consumption standpoint, reconfigured in each time slot of a TDMA frame to a power consumption tessellation in which subscriber unit circuit components not needed for communication signal processing in that time slot are powered down, and other components are powered up. Some circuit components are powered down by switching their power supply circuits. In order to minimize the extent of circuitry that must be provided to distribute power consumption control signals, other techniques (which utilize circuitry provided for other purposes), such as clock frequency control or power down commands, also are utilized to modify controlled circuit component power consumption without actually controlling power supply circuits.