Abstract: A circuit providing improved noise immunity for a first transistor including power terminals and a gate, the power terminals being connected to a power supply and to a load, and the gate being connected to receive control pulses from a pulse source for turning the first transistor on and off. A second transistor has power terminals connected across the gate and one power terminal of the first transistor, and a gate connected to a varying voltage circuit. This varying voltage circuit provides a voltage on the gate of the second transistor which varies in proportion to the spacing between the control pulses and turns on the second transistor when the spacing is greater than a preset value. The pulse source charges the varying voltage circuit during normal operation and the charge turns off the second transistor.