Abstract: A method and system for choosing the control processor for booting a multiprocessor system (10) in accordance with a memory (42). A computer system (10) includes a plurality of computer processors (12). The processors (12) use a memory bus (18) to communicate with the main memory (20). A second bus (30) connects the processors (12) to an interupt controller (34). The second bus (30) includes multiple bus request lines (14). An initialization control circuit (32) also communicates with the second bus (30). Memory (42) in the initialization control circuit (32) holds data identifying at least one of the processors (12) and when power is first provided to the system, the initialization control circuit (32) operates to assert signals on the bus request lines (14) such that the identified processor initializes the computer system.

Abstract: A multi-channel modulator for the transmission of telephony signals within a broadband communication system. An interpolation module generates processed I and Q signal components by upsampling filtered I and Q signal components. In turn, these processed I and Q signal components output by a filter are passed to a set of channel modulators. Each channel modulator accepts a pair of processed I and Q signal components and, in response, modulates a selected carrier signal with one of the telephony signals to produce a complex modulated signal. An adder module responds to the complex modulated signals by summing the real signal components to produce a real resultant signal, and to sum the imaginary components to produce an imaginary resultant signal. A digital-to-analog converter (DAC) module coverts the real resultant signal and the imaginary resultant signal, which are represented by digital data streams, to analog signals.