Abstract: A parallel-plate capacitor structure includes a capacitor electrode including a first resistance and an electrode tab appended to the capacitor electrode and including a second resistance. The second equivalent series resistance is greater than the first equivalent series resistance. A process of assembling a parallel-plate capacitor package is also disclosed. A computing system is also disclosed that includes the parallel-plate capacitor package.

Abstract: The present disclosure describes an embodiment of an apparatus comprising a first dielectric layer having a first variation of capacitance with temperature, a second dielectric layer having a second variation of capacitance with temperature, the second variation of capacitance with temperature being different than the first variation of capacitance with temperature, and a conductive layer sandwiched between the first and second dielectric layers. Also described is an embodiment of a process comprising forming a first dielectric layer comprising a dielectric having a first composition, stacking a conductive layer on the first dielectric layer, and stacking a second dielectric layer on the conductive layer, the second dielectric layer having a second composition different than the first composition. Other embodiments are also described and claimed.

Abstract: A method and apparatus is provided that pertains to a low inductance capacitor. The capacitor has a first surface electrically interconnected to a plurality of conductive electrodes and one or more second surfaces electrically interconnected to a plurality of electrodes interposed between the electrodes electrically interconnected to the first conductive surface. A dielectric layer separates the layered plurality of electrodes. The one or more second conductive surfaces are positioned within the body of the layered electrodes, such that the distance between the terminations of the first conductive surface and the one or more second conductive surfaces is shortened to lower inductance.

Abstract: A method and apparatus is provided that pertains to a low inductance capacitor. The capacitor has a first surface electrically interconnected to a plurality of conductive electrodes and one or more second surfaces electrically interconnected to a plurality of electrodes interposed between the electrodes electrically interconnected to the first conductive surface. A dielectric layer separates the layered plurality of electrodes. The one or more second conductive surfaces are positioned within the body of the layered electrodes, such that the distance between the terminations of the first conductive surface and the one or more second conductive surfaces is shortened to lower inductance.