Abstract: According to one general aspect, an apparatus may include a store stream detector configured to detect when the apparatus is streaming data to a memory system. The apparatus may also include a write generator configured to route a stream of data to either a near memory of the memory system or a far memory of the memory system based upon a cache threshold value and a size of the stream of data. The apparatus may be configured to dynamically vary the cache threshold value based upon a predetermined rule set, such that cache pollution caused by the stream of data is managed.

Abstract: According to one general aspect, an apparatus may include a store stream detector configured to detect when the apparatus is streaming data to a memory system. The apparatus may also include a write generator configured to route a stream of data to either a near memory of the memory system or a far memory of the memory system based upon a cache threshold value and a size of the stream of data. The apparatus may be configured to dynamically vary the cache threshold value based upon a predetermined rule set, such that cache pollution caused by the stream of data is managed.

Abstract: According to one general aspect, an apparatus may include a cache pre-fetcher, and a pre-fetch scheduler. The cache pre-fetcher may be configured to predict, based at least in part upon a virtual address, data to be retrieved from a memory system. The pre-fetch scheduler may be configured to convert the virtual address of the data to a physical address of the data, and request the data from one of a plurality of levels of the memory system. The memory system may include a plurality of levels, each level of the memory system configured to store data.

Abstract: An embodiment includes a system, comprising: a cache configured to store a plurality of cache lines, each cache line associated with a priority state from among N priority states; and a controller coupled to the cache and configured to: search the cache lines for a cache line with a lowest priority state of the priority states to use as a victim cache line; if the cache line with the lowest priority state is not found, reduce the priority state of at least one of the cache lines; and select a random cache line of the cache lines as the victim cache line if, after performing each of the searching of the cache lines and the reducing of the priority state of at least one cache line K times, the cache line with the lowest priority state is not found. N is an integer greater than or equal to 3; and K is an integer greater than or equal to 1 and less than or equal to N?2.

Abstract: An electronic system includes: a storage unit configured to store a data array; a control unit configured to: determine availability of the data array; reorder access to the data array; and provide access to the data array.

Abstract: According to one general aspect, an apparatus may include a cache pre-fetcher, and a pre-fetch scheduler. The cache pre-fetcher may be configured to predict, based at least in part upon a virtual address, data to be retrieved from a memory system. The pre-fetch scheduler may be configured to convert the virtual address of the data to a physical address of the data, and request the data from one of a plurality of levels of the memory system. The memory system may include a plurality of levels, each level of the memory system configured to store data.

Abstract: Cache replacement policy mechanism for updating cache entries of a partitioned cache using a pseudo-LRU (least recently updated) scheme for partial updating of LRU bits.

Abstract: An embodiment includes a system, comprising: a cache configured to store a plurality of cache lines, each cache line associated with a priority state from among N priority states; and a controller coupled to the cache and configured to: search the cache lines for a cache line with a lowest priority state of the priority states to use as a victim cache line; if the cache line with the lowest priority state is not found, reduce the priority state of at least one of the cache lines; and select a random cache line of the cache lines as the victim cache line if, after performing each of the searching of the cache lines and the reducing of the priority state of at least one cache line K times, the cache line with the lowest priority state is not found. N is an integer greater than or equal to 3; and K is an integer greater than or equal to 1 and less than or equal to N?2.