Patents by Inventor Kevin Luke

Kevin Luke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080249079
    Abstract: The invention provides compounds and methods for inhibition of kinases, more specifically IGF 1 R kinases. The invention also provides compounds and methods for inhibition of wildtype Abl. The invention provides compounds for modulating protein kinase enzymatic activity for modulating cellular activities such as proliferation, differentiation, programmed cell death, migration and chemoinvasion. Compounds of the invention inhibit, regulate and/or modulate kinase receptor signal transduction pathways related to the changes in cellular activities as mentioned above, and the invention includes compositions which contain these compounds, and methods of using them to treat kinase-dependent diseases and conditions. A compound of formula (I), or a pharmaceutically acceptable salt, hydrate, or prodrug thereof, wherein, V is NR1R1a, or O—R1, wherein X is H, halo, C1-C6 alkyl, NO2, mono-, di-, or tri-halo substituted methyl, NR13R,14.
    Type: Application
    Filed: December 28, 2005
    Publication date: October 9, 2008
    Applicant: EXELIXIS, INC.
    Inventors: Jeff Chen, Lisa Esther Dalrymple Meyr, Sergey Epshteyn, Timothy Patrick Forsyth, Tai Phat Huynh, Mohamed Abdulkader Ibrahim, James W. Leahy, Gary Lee Lewis, Grace Mann, Larry W. Mann, Robin Tammie Noguchi, Brian Hugh Ridgway, Joan Cruz Sangalang, Kevin Luke Schnepp, Xian Shi, Craig Stacy Takeuchi, Matthew Alan Williams, John Nuss, Atwood K. Cheung
  • Patent number: 4469959
    Abstract: An input buffer circuit for translating TTL level inputs to CMOS levels and which constitutes a part of a monolithic semiconductor device is provided. An input inverter stage has the source of its load transistor connected via a bipolar transistor to a first voltage level. When a second voltage level at which the monolithic semiconductor device is intended to operate exceeds the first voltage level, an MOS transistor coupled in parallel with the bipolar transistor bypasses the bipolar transistor and connects the source of the load transistor directly to the first voltage level, thus eliminating the V.sub.BE drop of the bipolar transistor. The bypass means compensate for the body effect of the load transistor and maintain the switch point of the input inverter stage at a relatively constant point.
    Type: Grant
    Filed: March 15, 1982
    Date of Patent: September 4, 1984
    Assignee: Motorola, Inc.
    Inventors: Kevin Luke, Robert N. Allgood
  • Patent number: D522531
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: June 6, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Mark C. Solomon, Jonathan R. Harris, Kevin Luke Massaro
  • Patent number: D401568
    Type: Grant
    Filed: September 13, 1996
    Date of Patent: November 24, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: Tor Andrew Alden, Bassel Hage Daoud, Kevin Luke Massaro