Patents by Inventor Kevin M. Grosselfinger

Kevin M. Grosselfinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7095063
    Abstract: A multiple supply gate array structure facilitated by the provision of a shared n-well and an isolated n-well is described. The gate array structure allows implementation of a single voltage circuit or a multiple voltage circuit. In addition, the gate array structure allows metal reprogram to provide standard logic functions, or special logic functions such as a buffer function for a signal crossing a voltage island boundary. Other special logic functions may include, for example, a level-shifter function or a fence-hold function.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: August 22, 2006
    Assignee: International Business Machines Corporation
    Inventors: John M. Cohn, Kevin M. Grosselfinger, William F. Smith, Paul S. Zuchowski
  • Patent number: 6924661
    Abstract: An integrated circuit structure has at least one voltage island and a pattern of power switches within the voltage island. The pattern determines the number of (and evenly spaces) the power switches according to the size of the serviceable area to which each of the power switches can provide power. The size of the power switches are matched to the current and voltage that will be provided by the power buses. The size of the serviceable area to which each of the power switches can provide power is dependent upon the size of the power switches.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: August 2, 2005
    Assignee: International Business Machines Corporation
    Inventors: Patrick H. Buffet, John M. Cohn, Kevin M. Grosselfinger, Susan K. Lichtensteiger, William F. Smith
  • Publication number: 20040222444
    Abstract: A multiple supply gate array structure facilitated by the provision of a shared n-well and an isolated n-well is described. The gate array structure allows implementation of a single voltage circuit or a multiple voltage circuit. In addition, the gate array structure allows metal reprogram to provide standard logic functions, or special logic functions such as a buffer function for a signal crossing a voltage island boundary. Other special logic functions may include, for example, a level-shifter function or a fence-hold function.
    Type: Application
    Filed: May 7, 2003
    Publication date: November 11, 2004
    Applicant: International Business Machines Corporation
    Inventors: John M. Cohn, Kevin M. Grosselfinger, William F. Smith, Paul S. Zuchowski
  • Publication number: 20040155681
    Abstract: An integrated circuit structure has at least one voltage island and a pattern of power switches within the voltage island. The pattern determines the number of (and evenly spaces) the power switches according to the size of the serviceable area to which each of the power switches can provide power. The size of the power switches are matched to the current and voltage that will be provided by the power buses. The size of the serviceable area to which each of the power switches can provide power is dependent upon the size of the power switches.
    Type: Application
    Filed: February 10, 2003
    Publication date: August 12, 2004
    Applicant: International Business Machines Corporation
    Inventors: Patrick H. Buffet, John M. Cohn, Kevin M. Grosselfinger, Susan K. Lichtensteiger, William F. Smith