Abstract: One disclosed method comprises drawing current from a termination voltage supply and through a termination voltage delivery network by termination circuitry in response to a first signal on one or more lines terminated by the termination circuitry, shunting current from the termination voltage supply and through the termination voltage delivery network in response to a second signal on one or more terminated lines, and helping to reduce the shunted current for extended shunting.

Abstract: A method of modifying data of functional latches of a logic unit during scan chain testing thereof to verify a test case failure of a suspected cell comprises: (a) determining a test case failure in the logic unit through scan chain testing thereof; (b) suspending clocked operations of the logic unit; (c) during suspended clocked operations of the logic unit, performing the following steps: (i) reading logic states of the functional latches; and (ii) modifying the logic state of at least one of the functional latches based on the determined test case failure; (d) restarting clocked operations of the logic unit; and (e) reading logic states of the functional latches resulting from the modification to verify the test case failure of a suspected cell.

Abstract: The present invention is a simulation test program that incorporates a formatter which asks the simulator what, if anything has changed, rather than querying for all of the pin states and strengths at each iteration, i.e. at each time stamp. If nothing has changed in the current time stamp, then the time stamp is increased until a change which has occurred in the states of the pins is detected. Then the particular change is evaluated. This drastically reduces the runtime, memory usage, and output file size of the simulations.