Patents by Inventor Kevin M. McLaughlin
Kevin M. McLaughlin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250068065Abstract: This disclosure relates generally to a patterning structure (and methods and apparatus for forming such structures) including substrate having a partially fabricated semiconductor device film stack, a radiation-sensitive imaging layer over the substrate, an underlayer below the radiation-sensitive imaging layer, the underlayer including a labile species, a hardmask positioned below the underlayer, and a diffusion barrier layer positioned between the underlayer and the hardmask layer, the diffusion barrier layer including a diffusion barrier material that reduces diffusion of the labile species from the underlayer into the hardmask layer. In various embodiments, the reduction of diffusion of the labile species downwards from the underlayer into the hardmask results in relatively greater diffusion of the labile species upwards from the underlayer into the radiation-sensitive imaging layer.Type: ApplicationFiled: January 9, 2023Publication date: February 27, 2025Inventors: Sivananda Krishnan Kanakasabapathy, Kevin M. McLaughlin, Jialing Yang, Arpan Pravin Mahorowala, Durgalakshmi Singhal
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Publication number: 20240404822Abstract: Methods and apparatuses are provided herein for oxidizing an annular edge region of a substrate. A method for oxidizing an annular edge region of a substrate may include simultaneously flowing, while the substrate is supported by a substrate holder, an oxidizing gas around a periphery of the substrate and an inert gas through a showerhead and onto the substrate, thereby creating an annular gas region over an annular edge region of the substrate and an interior gas region over on an interior region of the substrate and the annular gas region has an oxidization rate higher than the interior gas region.Type: ApplicationFiled: August 12, 2024Publication date: December 5, 2024Inventors: Gerald Joseph Brady, Kevin M. McLaughlin, Pratik Sankhe, Bart J. van Schravendijk, Shriram Vasant Bapat
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Publication number: 20240387258Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.Type: ApplicationFiled: July 26, 2024Publication date: November 21, 2024Inventors: Hui-Jung Wu, Bart J. Van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
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Patent number: 12087573Abstract: Methods and apparatuses are provided herein for oxidizing an annular edge region of a substrate. A method may include providing the substrate to a substrate holder in a semiconductor processing chamber, the semiconductor processing chamber having a showerbead positioned above the substrate holder, and simultaneously flowing, while the substrate is supported by the substrate holder, (a) an oxidizing gas around a periphery of the substrate and (b) an inert gas that does not include oxygen through the showerhead and onto the substrate, thereby creating an annular gas region over an annular edge region of the substrate and an interior gas region over on an interior region of the substrate; the simultaneous flowing is not during a deposition of a material onto the substrate, and the annular gas region has an oxidization rate higher than the interior gas region.Type: GrantFiled: July 9, 2020Date of Patent: September 10, 2024Assignee: Lam Research CorporationInventors: Gerald Joseph Brady, Kevin M. McLaughlin, Pratik Sankhe, Bart J. van Schravendijk, Shriram Vasant Bapat
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Patent number: 12080592Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.Type: GrantFiled: September 10, 2019Date of Patent: September 3, 2024Assignee: Lam Research CorporationInventors: Hui-Jung Wu, Bart J. van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
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Publication number: 20230323532Abstract: In some examples, a rib cover is provided for a multi-station processing module having a rib disposed between adjacent processing chambers. An example rib cover comprises a first portion for supporting the rib cover on the rib, a first side shield to cover a first wall of the rib when the rib cover is fitted thereto, and at least one spacer to hold an inner surface of the rib cover away from the covered rib.Type: ApplicationFiled: August 30, 2021Publication date: October 12, 2023Inventors: Keith Joseph Martin, Todd Schroeder, Kevin M. McLaughlin, Jiuyuan Nie, Jialing Yang, Chee Whye Woo
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Publication number: 20230038611Abstract: Localized stresses can be modulated in a film deposited on a bowed semiconductor substrate by selectively and locally curing the film by ultraviolet (UV) radiation. A bowed semiconductor substrate can be asymmetrically bowed. A UV-curable film is deposited on the front side or the backside of the bowed semiconductor substrate. A mask is provided between the UV-curable film and a UV source, where openings in the mask are patterned to selectively define exposed regions and non-exposed regions of the UV-curable film. Exposed regions of the UV-curable film modulate localized stresses to mitigate bowing in the bowed semiconductor substrate.Type: ApplicationFiled: January 25, 2021Publication date: February 9, 2023Applicant: Lam Research CorporationInventors: Anirvan SIRCAR, Fayaz A. SHAIKH, Kevin M. MCLAUGHLIN, Alexander Ray FOX
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Publication number: 20230005740Abstract: Methods and apparatuses are provided herein for oxidizing an annular edge region of a substrate. A method may include providing the substrate to a substrate holder in a semiconductor processing chamber, the semiconductor processing chamber having a showerbead positioned above the substrate holder, and simultaneously flowing, while the substrate is supported by the substrate holder, (a) an oxidizing gas around a periphery of the substrate and (b) an inert gas that does not include oxygen through the showerhead and onto the substrate, thereby creating an annular gas region over an annular edge region of the substrate and an interior gas region over on an interior region of the substrate; the simultaneous flowing is not during a deposition of a material onto the substrate, and the annular gas region has an oxidization rate higher than the interior gas region.Type: ApplicationFiled: July 9, 2020Publication date: January 5, 2023Inventors: Gerald Joseph Brady, Kevin M. McLaughlin, Pratik Sankhe, Bart J. van Schravendijk, Shriram Vasant Bapat
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Publication number: 20220051938Abstract: Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.Type: ApplicationFiled: September 10, 2019Publication date: February 17, 2022Inventors: Hui-Jung Wu, Bart J. van Schravendijk, Mark Naoshi Kawaguchi, Gereng Gunawan, Jay E. Uglow, Nagraj Shankar, Gowri Channa Kamarthy, Kevin M. McLaughlin, Ananda K. Banerji, Jialing Yang, John Hoang, Aaron Lynn Routzahn, Nathan Musselwhite, Meihua Shen, Thorsten Bernd Lill, Hao Chi, Nicholas Dominic Altieri
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Patent number: 10763107Abstract: Methods and apparatuses suitable for encapsulation layers for memory devices at temperatures less than about 300° C. are provided herein. Methods involve introducing a reactive species by pulsing plasma while exposing a substrate to deposition reactants, and post-treating deposited encapsulation films to densify and reduce hydrogen content. Post-treatment methods include periodic exposure to inert plasma without reactants and exposure to ultraviolet radiation at a substrate temperature less than about 300° C.Type: GrantFiled: January 10, 2020Date of Patent: September 1, 2020Assignee: Lam Research CorporationInventors: Bart J. van Schravendijk, Akhil Singhal, Joseph Hung-chi Wei, Bhadri N. Varadarajan, Kevin M. McLaughlin, Casey Holder, Ananda K. Banerji
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Publication number: 20200152452Abstract: Methods and apparatuses suitable for depositing low hydrogen content, hermetic, thin encapsulation layers at temperatures less than about 300° C. are provided herein. Methods involve pulsing plasma while exposing a substrate to deposition reactants, and post-treating deposited encapsulation films to densify and reduce hydrogen content. Post-treatment methods include periodic exposure to inert plasma without reactants and exposure to ultraviolet radiation at a substrate temperature less than about 300° C.Type: ApplicationFiled: January 10, 2020Publication date: May 14, 2020Inventors: Bart J. van Schravendijk, Akhil Singhal, Joseph Hung-chi Wei, Bhadri N. Varadarajan, Kevin M. McLaughlin, Casey Holder, Ananda K. Banerji
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Patent number: 10240236Abstract: Apparatuses and methods for cleaning a semiconductor processing chamber is provided. The semiconductor processing chamber may include a UV radiation source, a substrate holder, and a UV transmissive window. The UV transmissive window may include one or multiple panes. One or more panes of the UV transmissive window may be non-reactive with fluorine containing chemistries. In multi-pane windows a purge gas flow path may be formed in the gap between windows. A purge gas may be flowed through the purge gas flow path to prevent process gases used in the chamber interior from reaching one or more panes of the UV transmissive window.Type: GrantFiled: March 6, 2015Date of Patent: March 26, 2019Assignee: Lam Research CorporationInventors: James Lee, George Andrew Antonelli, Kevin M. McLaughlin, Andrew John McKerrow, Curtis Bailey, Alexander R. Fox, Stephen Lau, Eugene Smargiassi, Casey Holder, Troy Daniel Ribaudo, Xiaolan Chen
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Patent number: 10157736Abstract: Methods and apparatuses suitable for depositing low hydrogen content, hermetic, thin encapsulation layers at temperatures less than about 300° C. are provided herein. Methods involve pulsing plasma while exposing a substrate to deposition reactants, and post-treating deposited encapsulation films to densify and reduce hydrogen content. Post-treatment methods include periodic exposure to inert plasma without reactants and exposure to ultraviolet radiation at a substrate temperature less than about 300° C.Type: GrantFiled: September 28, 2016Date of Patent: December 18, 2018Assignee: LAM RESEARCH CORPORATIONInventors: Bart J. van Schravendijk, Akhil Singhal, Joseph Hung-chi Wei, Bhadri N. Varadarajan, Kevin M. McLaughlin, Casey Holder, Ananda K. Banerji
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Patent number: 9873946Abstract: The present invention provides improved methods of preparing a low-k dielectric material on a substrate. The methods involve multiple operation ultraviolet curing processes in which UV intensity, wafer substrate temperature, UV spectral distribution, and other conditions may be independently modulated in each operation. Operations may be pulsed or even be concurrently applied to the same wafer. In certain embodiments, a film containing a structure former and a porogen is exposed to UV radiation in a first operation to facilitate removal of the porogen and create a porous dielectric film. In a second operation, the film is exposed to UV radiation to increase cross-linking within the porous film.Type: GrantFiled: January 9, 2015Date of Patent: January 23, 2018Assignee: Novellus Systems, Inc.Inventors: Jason Dirk Haverkamp, Dennis M. Hausmann, Kevin M. McLaughlin, Krishnan Shrinivasan, Michael Rivkin, Eugene Smargiassi, Mohamed Sabri
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Patent number: 9847221Abstract: Silicon oxide layer is deposited on a semiconductor substrate by PECVD at a temperature of less than about 200° C. and is treated with helium plasma to reduce stress of the deposited layer to an absolute value of less than about 80 MPa. Plasma treatment reduces hydrogen content in the silicon oxide layer, and leads to low stress films that can also have high density and low roughness. In some embodiments, the film is deposited on a semiconductor substrate that contains one or more temperature-sensitive layers, such as layers of organic material or spin-on dielectric that cannot withstand temperatures of greater than 250° C. In some embodiments the silicon oxide film is deposited to a thickness of between about 100-200 ?, and is used as a hardmask layer during etching of other layers on a semiconductor substrate.Type: GrantFiled: September 29, 2016Date of Patent: December 19, 2017Assignee: Lam Research CorporationInventors: Kevin M. McLaughlin, Amit Pharkya, Kapu Sirish Reddy
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Publication number: 20170323803Abstract: Methods and apparatuses suitable for depositing low hydrogen content, hermetic, thin encapsulation layers at temperatures less than about 300° C. are provided herein. Methods involve pulsing plasma while exposing a substrate to deposition reactants, and post-treating deposited encapsulation films to densify and reduce hydrogen content. Post-treatment methods include periodic exposure to inert plasma without reactants and exposure to ultraviolet radiation at a substrate temperature less than about 300° C.Type: ApplicationFiled: September 28, 2016Publication date: November 9, 2017Inventors: Bart J. van Schravendijk, Akhil Singhal, Joseph Hung-chi Wei, Bhadri N. Varadarajan, Kevin M. McLaughlin, Casey Holder, Ananda K. Banerji
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Publication number: 20160258057Abstract: Apparatuses and methods for cleaning a semiconductor processing chamber is provided. The semiconductor processing chamber may include a UV radiation source, a substrate holder, and a UV transmissive window. The UV transmissive window may include one or multiple panes. One or more panes of the UV transmissive window may be non-reactive with fluorine containing chemistries. In multi-pane windows a purge gas flow path may be formed in the gap between windows. A purge gas may be flowed through the purge gas flow path to prevent process gases used in the chamber interior from reaching one or more panes of the UV transmissive window.Type: ApplicationFiled: March 6, 2015Publication date: September 8, 2016Inventors: James Lee, George Andrew Antonelli, Kevin M. McLaughlin, Andrew John McKerrow, Curtis Bailey, Alexander R. Fox, Stephen Lau, Eugene Smargiassi, Casey Holder, Troy Daniel Ribaudo, Xiaolan Chen
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Publication number: 20150114292Abstract: The present invention provides improved methods of preparing a low-k dielectric material on a substrate. The methods involve multiple operation ultraviolet curing processes in which UV intensity, wafer substrate temperature, UV spectral distribution, and other conditions may be independently modulated in each operation. Operations may be pulsed or even be concurrently applied to the same wafer. In certain embodiments, a film containing a structure former and a porogen is exposed to UV radiation in a first operation to facilitate removal of the porogen and create a porous dielectric film. In a second operation, the film is exposed to UV radiation to increase cross-linking within the porous film.Type: ApplicationFiled: January 9, 2015Publication date: April 30, 2015Inventors: Jason Dirk Haverkamp, Dennis M. Hausmann, Kevin M. McLaughlin, Krishnan Shrinivasan, Michael Rivkin, Eugene Smargiassi, Mohamed Sabri
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Patent number: 8465991Abstract: A method for the ultraviolet (UV) treatment of carbon-containing low-k dielectric and associated apparatus enables process induced damage repair. The methods of the invention are particularly applicable in the context of damascene processing to recover lost low-k property of a dielectric damaged during processing, either pre-metallization, post-planarization, or both. UV treatments can include an exposure of the subject low-k dielectric to a constrained UV spectral profile and/or chemical silylating agent, or both.Type: GrantFiled: December 20, 2010Date of Patent: June 18, 2013Assignee: Novellus Systems, Inc.Inventors: Bhadri N. Varadarajan, Kevin M. McLaughlin, Bart van Schravendijk
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Publication number: 20110117678Abstract: A method for the ultraviolet (UV) treatment of carbon-containing low-k dielectric and associated apparatus enables process induced damage repair. The methods of the invention are particularly applicable in the context of damascene processing to recover lost low-k property of a dielectric damaged during processing, either pre-metallization, post-planarization, or both. UV treatments can include an exposure of the subject low-k dielectric to a constrained UV spectral profile and/or chemical silylating agent, or both.Type: ApplicationFiled: December 20, 2010Publication date: May 19, 2011Inventors: Bhadri N. Varadarajan, Kevin M. McLaughlin, Bart van Schravendijk