Abstract: The present disclosure relates to methods and apparatus of operation of a graphics processing unit (GPU). The apparatus can write, for each tile in a set of tiles in a tile memory, clear color information to a buffer corresponding to the tile. Additionally, the apparatus can render at least one tile in the set of tiles to a system memory. In some aspects, the at least one tile can include additional information other than the clear color information. The apparatus can also write, for the at least one tile that includes the additional information, information associated with the additional information to the buffer corresponding to the tile. Further, the apparatus can generate, for each tile in the set of tiles, visibility information for the tile. In some aspects, the visibility information can include information regarding whether the tile includes visible draw calls.

Abstract: Techniques are described for generating, with a graphics processing unit (GPU), depth values for pixels of a tile. The tile is one of a plurality of tiles of a frame. The GPU may store a first number of the depth values for the pixels in a tile memory internal to the GPU. The tile memory is configured to store image content for the tile of the frame. The GPU may write a second number of the depth values stored in the tile memory to a system memory. The second number is less than the first number.

Abstract: Techniques are described for generating, with a graphics processing unit (GPU), depth values for pixels of a tile. The tile is one of a plurality of tiles of a frame. The GPU may store a first number of the depth values for the pixels in a tile memory internal to the GPU. The tile memory is configured to store image content for the tile of the frame. The GPU may write a second number of the depth values stored in the tile memory to a system memory. The second number is less than the first number.