Abstract: A circuit for voltage transient protection is provided. The circuit includes an input monitor circuit, an input transistor, and a voltage regulator. The input transistor is connected between the input voltage and the input voltage terminal of the voltage regulator. The input monitor circuit asserts an input monitor circuit output signal if the input voltage reaches a pre-determined level. When the input monitor circuit output signal is asserted, and gate and source of the input transistor are shorted together (to disconnect the input of the voltage regulator from the input voltage), and the voltage regulator is disabled.

Abstract: A circuit for voltage transient protection is provided. The circuit includes a voltage divider, a low-voltage reset circuit, and an input transistor. The input transistor receives an input voltage at the source of the input transistor, and provides a protected input voltage at the drain of the input transistor. The voltage divider provides a threshold voltage from the input voltage. The low-voltage reset circuit receives the threshold voltage. The low-voltage reset circuit causes the gate and source of the input transistor to short together when the low-voltage reset circuit is not in a reset state.