Patents by Inventor Kevin P. MA

Kevin P. MA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12158625
    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to a bidirectional optical grating coupler that may be used for testing. A photonic apparatus includes a first layer with electro-optical circuitry that is optically coupled with a bidirectional optical grating coupler. A second layer is physically coupled with a first side of the first layer and includes a first light path to optically coupled with the bidirectional optical grating coupler. A third layer is physically coupled with a second side of the first layer opposite the first side of the first layer, and includes a second light path that optically couples with the bidirectional grating coupler. Operational testing of the electro-optical circuitry is based in part on light received or transmitted through the second light path. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: December 3, 2024
    Assignee: Intel Corporation
    Inventors: Kaveh Hosseini, Xiaoqian Li, Conor O'Keeffe, Jing Fang, Kevin P. Ma, Shamsul Abedin
  • Publication number: 20240256283
    Abstract: A system is provided that includes a set of graph processing cores and a set of dense compute cores. where the set of graph processing cores and the set of dense cores are interconnected in a network. The dense compute cores include offload queue circuitry to receive an offload request from the set of graph processing cores to handle dense compute workloads. Memory controllers are also provided in the system for use by the graph processing cores in reading and writing to memory in association with sparse graph applications. the memory controllers enhanced to efficiently handle memory transactions in sparse graph applications.
    Type: Application
    Filed: March 31, 2022
    Publication date: August 1, 2024
    Applicant: Intel Corporation
    Inventors: Joshua B. Fryman, Byoungchan Oh, Sai Dheeraj Polagani, Kevin P. Ma, Robert S. Pawlowski, Bharadwaj Coimbatore Krishnamurthy, Shruti Sharma, Smitha P. Vasantha Kumar, Jason Howard, Daniel S. Klowden
  • Publication number: 20220196936
    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to a bidirectional optical grating coupler that may be used for testing. A photonic apparatus includes a first layer with electro-optical circuitry that is optically coupled with a bidirectional optical grating coupler. A second layer is physically coupled with a first side of the first layer and includes a first light path to optically coupled with the bidirectional optical grating coupler. A third layer is physically coupled with a second side of the first layer opposite the first side of the first layer, and includes a second light path that optically couples with the bidirectional grating coupler. Operational testing of the electro-optical circuitry is based in part on light received or transmitted through the second light path. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Inventors: Kaveh HOSSEINI, Xiaoqian LI, Conor O'KEEFFE, Jing FANG, Kevin P. MA, Shamsul ABEDIN
  • Publication number: 20220107465
    Abstract: Apparatus and methods employing wormhole structures supporting ultra-high density optical routing systems. Microstructures comprising wormhole tunnels are formed in optical looms with wormhole openings arranged in patterns, such as a high-density XY grid. Optical fibers are inserted into respective wormhole tunnels, and sleeves are used to precisely align fiber ends. A rack loom comprising a wormhole backplane is fabricated in a similar manner, with wormhole openings arrayed in the same patterns. The sleeves comprise plug-receptacle sleeve pairs, where when an optical loom (or connector bar of the optical loom) face urged toward the front face of the rack loom, the plug and receptacle sleeves are mated, resulting in precise alignment of the optical fiber ends in the pairs of sleeves. Palpebral structures may also be fabricated to provide a self-cleaning function with optional lubrication.
    Type: Application
    Filed: December 16, 2021
    Publication date: April 7, 2022
    Inventors: Ralph JENSEN, Michael T. CROCKER, Aaron GORIUS, Kevin P. MA
  • Publication number: 20220092016
    Abstract: Embodiments herein relate to systems, apparatuses, or techniques for using an optical physical layer die within a system-on-a-chip to optically couple with an optical physical layer die on another package to provide high-bandwidth memory access between the system-on-a-chip and the other package. In embodiments, the other package may be a large optically connected memory device that includes a memory controller coupled with an optical physical layer die, where the memory controller is coupled with memory. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 24, 2020
    Publication date: March 24, 2022
    Inventors: Mahesh K. KUMASHIKAR, Dheeraj SUBBAREDDY, Anshuman THAKUR, MD Altaf HOSSAIN, Ankireddy NALAMALPU, Casey G. THIELEN, Daniel S. KLOWDEN, Kevin P. MA, Sergey Yuryevich SHUMARAYEV, Sandeep SANE, Conor O'KEEFFE