Patents by Inventor Kevin P. Manning

Kevin P. Manning has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10677815
    Abstract: An example test system has resources that are distributed for access by a device under test (DUT). The example test system includes a device interface board (DIB) having sites to connect to devices to test, and a tester having slots configured to hold test instruments. Each test instrument has resources that are distributed over a dimension of the DIB. The resources are distributed to enable the devices in the sites equal access to the resources.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: June 9, 2020
    Assignee: Teradyne, Inc.
    Inventors: Mohamadreza Ray Mirkhani, Kevin P. Manning, Roya Yaghmai, Timothy Lee Farris, Frank Parrish
  • Publication number: 20190377007
    Abstract: An example test system has resources that are distributed for access by a device under test (DUT). The example test system includes a device interface board (DIB) having sites to connect to devices to test, and a tester having slots configured to hold test instruments. Each test instrument has resources that are distributed over a dimension of the DIB. The resources are distributed to enable the devices in the sites equal access to the resources.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 12, 2019
    Inventors: Mohamadreza Ray Mirkhani, Kevin P. Manning, Roya Yaghmai, Timothy Lee Farris, Frank Parrish
  • Patent number: 6734688
    Abstract: Automatic test equipment adapted for testing a plurality of devices-under-test (DUTs) is disclosed. The automatic test equipment includes a mainframe computer and a test head coupled to the mainframe computer. The test head includes a low-profile tester interface having a first interface board and a device board. The device board engages contact points on the DUTs and includes a topside. A hard stop is mounted to the first interface board and defines a reference plane. The hard stop is adapted to engage the device board topside to vertically fix the device board, positionally with respect to the first interface board. The automatic test equipment further includes a compliant interconnect array adapted for compression between the first interface board and the device board.
    Type: Grant
    Filed: May 15, 2000
    Date of Patent: May 11, 2004
    Assignee: Teradyne, Inc.
    Inventors: Derek Castellano, Keith Breinlinger, Kevin P. Manning
  • Publication number: 20020005714
    Abstract: Automatic test equipment adapted for testing a plurality of devices-under-test (DUTs) is disclosed. The automatic test equipment includes a mainframe computer and a test head coupled to the mainframe computer. The test head includes a low-profile tester interface having a first interface board and a device board. The device board engages contact points on the DUTs and includes a topside. A hard stop is mounted to the first interface board and defines a reference plane. The hard stop is adapted to engage the device board topside to vertically fix the device board positionally with respect to the first interface board. The automatic test equipment further includes a compliant interconnect array adapted for compression between the first interface board and the device board. The array includes a plurality of elastomeric connectors, each comprising a thin layer of foam material and a plurality of formed contact pins. The pins are embedded in spaced-apart relationship in the foam material.
    Type: Application
    Filed: April 12, 2001
    Publication date: January 17, 2002
    Inventor: Kevin P. Manning