Patents by Inventor Kevin Pope
Kevin Pope has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11963711Abstract: An electrosurgical system is provided and includes an electrosurgical instrument and an electrosurgical generator. The electrosurgical system obtains information about the tissue undergoing a sealing process in order to calculate information about the tissue undergoing the sealing process and, in real-time, modify the RF energy being provided to the electrosurgical instrument from the electrosurgical generator. In this way, the electrosurgical system manages the supply of RF energy to optimally seal different types of tissue. The electrosurgical instrument is configured to seal the tissue using the RF energy.Type: GrantFiled: December 30, 2020Date of Patent: April 23, 2024Assignee: Applied Medical Resources CorporationInventors: Ryan Pope, Melissa Brodsky, Vincent Rodriguez, Molly Marbut, Kevin Siazon, Emily Koehler
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Patent number: 10361407Abstract: An electrical energy storage device has electrodes positioned in a case. A feedthrough pin extends through a portion of the case. A sealant surrounds the feedthrough pin and contacts a component of the device. A seal activator is received in the sealant such that the pressure that the sealant applies to the component increases above the level of pressure that the sealant applies to the component before the sealant activator is received in the sealant. In some instances, the component is the feedthrough pin.Type: GrantFiled: May 3, 2016Date of Patent: July 23, 2019Assignee: Quallion LLCInventors: Michael Escobar, Grant Farrell, Kevin Pope, Hiroshi Nakahara, Somadatta Mohanty
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Patent number: 7916036Abstract: A patient position pad is provided that includes a timer. The patient position pad is configured to detect the position of a patient. The timer is configured to track the useful life of the patient position pad.Type: GrantFiled: December 17, 2007Date of Patent: March 29, 2011Assignee: Stanley Security Solutions, Inc.Inventors: Philip Kevin Pope, Joel R. Hoerth, Harold Todd Tyler
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Patent number: 5956324Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: October 30, 1997Date of Patent: September 21, 1999Assignee: Applied Digital Access, Inc.Inventors: Thomas L. Engdahl, Paul R. Hartmann, Kevin Pope, Kevin Cadieux
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Patent number: 5875217Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: May 26, 1995Date of Patent: February 23, 1999Assignee: Applied Digital AccessInventors: Paul R. Hartmann, Kevin Pope, Kevin Cadieux
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Patent number: 5703871Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: May 26, 1995Date of Patent: December 30, 1997Assignee: Applied Digital AccessInventors: Kevin Pope, Paul R. Hartmann
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Patent number: 5691976Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: September 7, 1993Date of Patent: November 25, 1997Assignee: Applied Digital AccessInventors: Thomas L. Engdahl, Paul R. Hartmann, Kevin Pope, Kevin Cadieux
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Patent number: 5623480Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and substrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: May 26, 1995Date of Patent: April 22, 1997Assignee: Applied Digital Access, Inc.Inventors: Paul R. Hartmann, Thomas L. Engdahl, Kevin Cadieux, Kevin Pope
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Patent number: 5602828Abstract: A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: May 26, 1995Date of Patent: February 11, 1997Assignee: Applied Digital AccessInventors: Thomas L. Engdahl, Paul R. Hartmann, Kevin Pope, Kevin Cadieux
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Patent number: 5581228Abstract: A DS3 level access, monitor and test system including a digital comparator for a telephone network. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.Type: GrantFiled: May 26, 1995Date of Patent: December 3, 1996Assignee: Applied Digital Access, Inc.Inventors: Kevin Cadieux, Paul R. Hartmann, Kevin Pope