Patents by Inventor Kevin R. Lish

Kevin R. Lish has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7425464
    Abstract: Methods and apparatus are provided for encapsulating electronic devices, comprising: providing one or more electronic devices (62) with primary faces (63) having electrical contacts (69), opposed rear faces (65) and edges (64) therebetween. A sacrificial layer (70) is provided on the primary faces (63). The devices (62) are mounted on a temporary support (80) so that the sacrificial layer (70) faces toward the temporary support (80). A plastic encapsulation (86)is formed in contact with at least the lateral edges (64) of the electronic devices (62). The plastic encapsulation (86) is at least partially cured and the devices (62) and plastic encapsulation (86) separated from the temporary support (80), thereby exposing the sacrificial layer (70). The sacrificial layer (70) is removed. The devices (62) and edge-contacting encapsulation are mounted on a carrier (90) with the primary faces (63) and electrical contacts (69) exposed and, optionally, further cured.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: September 16, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Owen R. Fay, Kevin R. Lish, Douglas G. Mitchell
  • Publication number: 20080182363
    Abstract: A method for forming a microelectronic assembly is provided. A carrier substrate (30) is provided. A sacrificial layer (38) is formed over the carrier substrate. A polymeric layer (40), including a polymeric tape (42) and a polymeric layer adhesive (44), is formed over the sacrificial layer. The polymeric layer adhesive is between the sacrificial layer and the polymeric tape. A microelectronic die (52), having an integrated circuit formed therein, is placed on the polymeric layer. The microelectronic die is encapsulated with an encapsulation material (54) to form an encapsulated structure (58). The polymeric layer and the encapsulated structure are separated from the carrier substrate. The separating of the polymeric layer and the encapsulated structure includes at least partially deteriorating the sacrificial layer.
    Type: Application
    Filed: January 31, 2007
    Publication date: July 31, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Craig S. Amrine, Owen R. Fay, Lizabeth Ann Keser, Kevin R. Lish, William H. Lytle, Chandrasekaram Ramiah, Jerry L. White
  • Patent number: 7015075
    Abstract: A process for encapsulating an integrated circuit die (403) using a porous carrier (101). In one example, an adhesive structure (e.g. tape) is applied to a porous carrier. Integrated circuit die is then placed on the adhesive structure. The integrated circuit die is then encapsulated to form an encapsulated structure (505). The carrier is then subjected to a solvent that passes through the carrier to reduce the adhesive strength of the adhesive structure for removal of the carrier from the encapsulated structure.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: March 21, 2006
    Assignee: Freescale Semiconuctor, Inc.
    Inventors: Owen R. Fay, Craig S. Amrine, Kevin R. Lish