Patents by Inventor Kevin T. Knadle
Kevin T. Knadle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7596862Abstract: A method of making the circuitized substrate. The circuitized substrate includes a substrate having a substantially planar upper surface and a conductive layer positioned on the substantially planar upper surface. The conductive layer includes at least one side wall therein, defining an opening in the conductive layer. The conductive layer includes an end portion spaced from the opening, the end portion forming an acute angle with the substantially planar upper surface of the substrate. The at least one side wall is substantially perpendicular to the substantially planar upper surface of the substrate.Type: GrantFiled: September 28, 2007Date of Patent: October 6, 2009Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Kevin T. Knadle, Andrew M. Seman
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Patent number: 7325299Abstract: A method of making a circuitized substrate. A conductive layer having a substantially planar upper surface is formed on and in direct mechanical contact with an upper surface of a substrate. A portion of the conductive layer is removed to form an interim side wall in the conductive layer. A layer of patternable material is formed on the substantially planar upper surface and on the interim side wall. A portion of the layer of patternable material on the conductive layer is removed to expose the interim side wall. A portion of the substantially planar upper surface is removed to form a side wall in the layer of patternable material. Portions of the interim side wall in the conductive layer are removed to form a second side wall and a bottom wall defined by the upper surface of the substrate. The second side wall is substantially perpendicular to the bottom wall.Type: GrantFiled: January 4, 2007Date of Patent: February 5, 2008Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Kevin T. Knadle, Andrew M. Seman
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Patent number: 7185428Abstract: A circuitized substrate and a method of making the circuitized substrate is provided. The circuitized substrate includes a substrate having a substantially planar upper surface and a conductive layer positioned on the substantially planar upper surface. The conductive layer includes at least one side wall therein, defining an opening in the conductive layer. The conductive layer includes an end portion spaced from the opening, the end portion forming an acute angle with the substantially planar upper surface of the substrate. The at least one side wall is substantially perpendicular to the substantially planar upper surface of the substrate.Type: GrantFiled: December 16, 2003Date of Patent: March 6, 2007Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Kevin T. Knadle, Andrew M. Seman
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Patent number: 7129732Abstract: A test apparatus for testing circuitized substrates such as PCB test coupons for thru-hole failure in which the substrate may be cooled to a temperature less than the ambient temperature surrounding the test apparatus housing in which the testing is accomplished. A method of testing substrates is also provided.Type: GrantFiled: November 18, 2005Date of Patent: October 31, 2006Assignee: Endicott Interconnect Technologies, Inc.Inventor: Kevin T. Knadle
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Patent number: 6962642Abstract: A process by which high frequency printed wiring board construction can be fabricated using smooth copper surfaces. A conductive, thin film polymer is plated on smooth copper surfaces of a core lamination. The polymer can be selected from a group of materials consisting of polypyrrole, polyaniline, polythiophene, and combinations thereof. The conductive polymer promotes adhesion between the resin polymer of the laminate and the smooth copper surfaces.Type: GrantFiled: September 26, 2002Date of Patent: November 8, 2005Assignee: International Business Machines CorporationInventors: Kevin T. Knadle, Anita Sargent
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Patent number: 6931722Abstract: A method of fabricating a printed circuit device including an electrically insulating substrate, and first, second, and third sets of conductors formed on a top surface of the substrate is disclosed. The method includes forming an oxide layer on the set of second conductors; forming a solder mask on the oxide layer; forming a composite layer on the first set of conductors; and forming a solder layer on at least a portion of the third set of conductors.Type: GrantFiled: March 24, 2003Date of Patent: August 23, 2005Assignee: International Business Machines CorporationInventors: Edward L. Arrington, Anilkumar C. Bhatt, Edmond O. Fey, Kevin T. Knadle, John J. Konrad, Joseph A Kotylo, Jeffrey McKeveny, Jose A. Rios, Amit K. Sarkhel, Andrew M. Seman, Timothy L. Wells
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Patent number: 6822332Abstract: A circuitized substrate and a method of making the circuitized substrate is provided. The circuitized substrate includes a substrate having a substantially planar upper surface and a conductive layer positioned on the substantially planar upper surface. The conductive layer includes at least one side wall therein, defining an opening in the conductive layer. The conductive layer includes an end portion spaced from the opening, the end portion forming an acute angle with the substantially planar upper surface of the substrate. The at least one side wall is substantially perpendicular to the substantially planar upper surface of the substrate.Type: GrantFiled: September 23, 2002Date of Patent: November 23, 2004Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Kevin T. Knadle, Andrew M. Seman
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Publication number: 20040130003Abstract: A circuitized substrate and a method of making the circuitized substrate is provided. The circuitized substrate includes a substrate having a substantially planar upper surface and a conductive layer positioned on the substantially planar upper surface. The conductive layer includes at least one side wall therein, defining an opening in the conductive layer. The conductive layer includes an end portion spaced from the opening, the end portion forming an acute angle with the substantially planar upper surface of the substrate. The at least one side wall is substantially perpendicular to the substantially planar upper surface of the substrate.Type: ApplicationFiled: December 16, 2003Publication date: July 8, 2004Applicant: International Business Machines CorporationInventors: Frank D. Egitto, Kevin T. Knadle, Andrew M. Seman
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Publication number: 20040060729Abstract: A process by which high frequency printed wiring board construction can be fabricated using smooth copper surfaces. A conductive, thin film polymer is plated on smooth copper surfaces of a core lamination. The polymer can be selected from a group of materials consisting of polypyrrole, polyaniline, polythiophene, and combinations thereof. The conductive polymer promotes adhesion between the resin polymer of the laminate and the smooth copper surfaces.Type: ApplicationFiled: September 26, 2002Publication date: April 1, 2004Applicant: International Business Machines CorporationInventors: Kevin T. Knadle, Anita Sargent
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Publication number: 20040056330Abstract: A circuitized substrate and a method of making the circuitized substrate is provided. The circuitized substrate includes a substrate having a substantially planar upper surface and a conductive layer positioned on the substantially planar upper surface. The conductive layer includes at least one side wall therein, defining an opening in the conductive layer. The conductive layer includes an end portion spaced from the opening, the end portion forming an acute angle with the substantially planar upper surface of the substrate. The at least one side wall is substantially perpendicular to the substantially planar upper surface of the substrate.Type: ApplicationFiled: September 23, 2002Publication date: March 25, 2004Applicant: International Business Machines CorporationInventors: Frank D. Egitto, Kevin T. Knadle, Andrew M. Seman
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Publication number: 20030177635Abstract: A method of fabricating a printed circuit device including an electrically insulating substrate, and first, second, and third sets of conductors formed on a top surface of the substrate is disclosed. The method includes forming an oxide layer on the set of second conductors; forming a solder mask on the oxide layer; forming a composite layer on the first set of conductors; and forming a solder layer on at least a portion of the third set of conductors.Type: ApplicationFiled: March 24, 2003Publication date: September 25, 2003Inventors: Edward L. Arrington, Anilkumar C. Bhatt, Edmond O. Fey, Kevin T. Knadle, John J. Konrad, Joseph A. Kotylo, Jeffrey McKeveny, Jose A. Rios, Amit K. Sarkhel, Andrew M. Seman, Timothy L. Wells
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Patent number: 6586683Abstract: A method of fabricating a printed circuit device including an electrically insulating substrate, and first, second, and third sets of conductors formed on a top surface of the substrate is disclosed. The method includes forming an oxide layer on the set of second conductors; forming a solder mask on the oxide layer; forming a composite layer on the first set of conductors; and forming a solder layer on at least a portion of the third set of conductors.Type: GrantFiled: April 27, 2001Date of Patent: July 1, 2003Assignee: International Business Machines CorporationInventors: Edward L. Arrington, Anilkumar C. Bhatt, Edmond O. Fey, Kevin T. Knadle, John J. Konrad, Joseph A. Kotylo, Jeffrey McKeveny, Jose A. Rios, Amit K. Sarkhel, Andrew M. Seman, Timothy L. Wells
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Publication number: 20020157861Abstract: A method of fabricating a printed circuit device including an electrically insulating substrate, and first, second, and third sets of conductors formed on a top surface of the substrate is disclosed. The method includes forming an oxide layer on the set of second conductors; forming a solder mask on the oxide layer; forming a composite layer on the first set of conductors; and forming a solder layer on at least a portion of the third set of conductors.Type: ApplicationFiled: April 27, 2001Publication date: October 31, 2002Applicant: International Business Machines CorporationInventors: Edward L. Arrington, Anilkumar C. Bhatt, Edmond O. Fey, Kevin T. Knadle, John J. Konrad, Joseph A. Kotylo, Jeffrey McKeveny, Jose A. Rios, Amit K. Sarkhel, Andrew M. Seman, Timothy L. Wells
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Patent number: 6423905Abstract: A printed wiring board having a layered composite of metal planes and dielectric layers. At least one of the dielectric layers has a modulus lower than the modulus of the remaining dielectric material layers. A plating, extending through the layered composite, has a first land on a first external surface of the layered composite, a second land on a second external surface of the layered composite, and a barrel extending between the first land and the second land. The lower modulus dielectric material layer deforms during thermal excursions of the printed wiring board in such a way as to reduce the strains imposed on both the lands and the barrel of the plated through holes.Type: GrantFiled: May 1, 2000Date of Patent: July 23, 2002Assignee: International Business Machines CorporationInventors: William L. Brodsky, Kevin T. Knadle, John M. Lauffer, Douglas O. Powell, David J. Russell