Patents by Inventor Kevin T. MORTIMER

Kevin T. MORTIMER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11775259
    Abstract: An apparatus includes a carry chain circuit and a detector circuit. The carry chain circuit includes a plurality of stages. Each stage of the plurality of stages includes a plurality of lookup table elements coupled in sequence. The carry chain circuit propagates a clock signal through the plurality of lookup table elements of the plurality of stages. The detector circuit determines, based on a value of the clock signal stored by a final lookup table element of each stage of the plurality of stages, which stage of the plurality stages contains an edge of the clock signal. The detector circuit then outputs a zero if the determined stage is assigned to a first group of the plurality of stages and a one if the determined stage is assigned to a second group of the plurality of stages.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: October 3, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Michael G. Curcio, Kent H. Hoult, Kevin T. Mortimer
  • Publication number: 20230115029
    Abstract: An apparatus includes a carry chain circuit and a detector circuit. The carry chain circuit includes a plurality of stages. Each stage of the plurality of stages includes a plurality of lookup table elements coupled in sequence. The carry chain circuit propagates a clock signal through the plurality of lookup table elements of the plurality of stages. The detector circuit determines, based on a value of the clock signal stored by a final lookup table element of each stage of the plurality of stages, which stage of the plurality stages contains an edge of the clock signal. The detector circuit then outputs a zero if the determined stage is assigned to a first group of the plurality of stages and a one if the determined stage is assigned to a second group of the plurality of stages.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 13, 2023
    Inventors: Michael G. CURCIO, Kent H. HOULT, Kevin T. MORTIMER
  • Patent number: 11544039
    Abstract: An apparatus includes a ring oscillator, a carry chain circuit, and a detector circuit. The ring oscillator produces a clock signal. The carry chain circuit includes a plurality of stages. Each stage of the plurality of stages includes a plurality of lookup table elements coupled in sequence. The carry chain circuit propagates the clock signal through the plurality of lookup table elements of the plurality of stages. The detector circuit determines, based on a value of the clock signal stored by a final lookup table element of each stage of the plurality of stages, which stage of the plurality stages contains an edge of the clock signal. The detector circuit then outputs a zero if the determined stage is assigned to a first group of the plurality of stages and a one if the determined stage is assigned to a second group of the plurality of stages.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: January 3, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Michael G. Curcio, Kent H. Hoult, Kevin T. Mortimer
  • Publication number: 20220121422
    Abstract: An apparatus includes a ring oscillator, a carry chain circuit, and a detector circuit. The ring oscillator produces a clock signal. The carry chain circuit includes a plurality of stages. Each stage of the plurality of stages includes a plurality of lookup table elements coupled in sequence. The carry chain circuit propagates the clock signal through the plurality of lookup table elements of the plurality of stages. The detector circuit determines, based on a value of the clock signal stored by a final lookup table element of each stage of the plurality of stages, which stage of the plurality stages contains an edge of the clock signal. The detector circuit then outputs a zero if the determined stage is assigned to a first group of the plurality of stages and a one if the determined stage is assigned to a second group of the plurality of stages.
    Type: Application
    Filed: October 19, 2020
    Publication date: April 21, 2022
    Inventors: Michael G. CURCIO, Kent H. HOULT, Kevin T. MORTIMER