Patents by Inventor Kevin W. Kolvenbach

Kevin W. Kolvenbach has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Via leakage and breakdown testing
    Patent number: 9851398
    Abstract: Various particular embodiments include a via testing structure, including: a first terminal coupled to a first set of sensing lines in a top level of the structure; a second terminal coupled to a second set of sensing lines in the top level of the structure, wherein first set of sensing lines and the second set of sensing lines are disposed in a comb arrangement; a third terminal coupled to a third set of sensing lines in a bottom level of the structure; and a plurality of vias electrically coupling the second set of sensing lines in the top level of the structure to the third set of sensing lines in the bottom level of the structure, each via having a via top and a via bottom.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: December 26, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Fen Chen, Roger A. Dufresne, Charles W. Griffin, Kevin W. Kolvenbach
  • VIA LEAKAGE AND BREAKDOWN TESTING
    Publication number: 20160291084
    Abstract: Various particular embodiments include a via testing structure, including: a first terminal coupled to a first set of sensing lines in a top level of the structure; a second terminal coupled to a second set of sensing lines in the top level of the structure, wherein first set of sensing lines and the second set of sensing lines are disposed in a comb arrangement; a third terminal coupled to a third set of sensing lines in a bottom level of the structure; and a plurality of vias electrically coupling the second set of sensing lines in the top level of the structure to the third set of sensing lines in the bottom level of the structure, each via having a via top and a via bottom.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 6, 2016
    Inventors: Fen Chen, Roger A. Dufresne, Charles W. Griffin, Kevin W. Kolvenbach
  • Structure and method for thermally stressing or testing a semiconductor device
    Patent number: 7375371
    Abstract: A structure is provided which includes at least one semiconductor device and a diffusion heater in a continuous active semiconductor area of a substrate. One or more semiconductor devices are provided in a first region of the active semiconductor area and a diffusion heater is disposed adjacent thereto which consists essentially of a semiconductor material included in the active semiconductor area. Conductive isolation between the first region and the diffusion heater is achieved through use of a separating gate. The separating gate overlies an intermediate region of the active semiconductor area between the first region and the diffusion heater and the separating gate is biasable to conductively isolate the first region from the diffusion heater.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: May 20, 2008
    Assignee: International Business Machines Corporation
    Inventors: Giuseppe La Rosa, Kevin W. Kolvenbach, John Greg Massey, Ping-Chuan Wang, Kai Xiu