Patents by Inventor Kevin W. Plouse

Kevin W. Plouse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Flash EEPROM array with high endurance
    Patent number: 5335198
    Abstract: An over-erased bit correction structure is provided for performing a correction operation on over-erased memory cells in an array of flash EEPROM memory cells during programming operations so as to render high endurance. Sensing circuitry (23) is used to detect column leakage current indicative of an over-erased bit. If an over-erased bit is determined, a pulse counter (25) is activated so as to apply programming pulses to the control gate of the selected memory cell so as to program back the negative threshold voltage of the over-erased bit to a positive voltage.
    Type: Grant
    Filed: May 6, 1993
    Date of Patent: August 2, 1994
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael A. Van Buskirk, Kevin W. Plouse, Joseph G. Pawletko, Chi Chang, Sameer S. Haddad, Ravi P. Gutala