Patents by Inventor Kevin W. Rudd

Kevin W. Rudd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8024735
    Abstract: A system and method for determine which threads to execute at a given time in a multi-threaded computer system. A thread prioritizer determines execution fairness between pairs of potentially executing threads. A switch enabler determines forward progress of each executing thread. The resulting indicators from the thread prioritizer and switch enabler may aid in the determination of whether or not to switch a particular potentially executing thread into execution resources.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: September 20, 2011
    Assignee: Intel Corporation
    Inventors: Kevin W. Rudd, Udo Walterscheidt
  • Patent number: 7181601
    Abstract: A method and apparatus for enabling the speculative forking of a speculative thread is disclosed. In one embodiment, a speculative fork instruction is conditioned by the results of a fork predictor. The fork predictor may issue predictions as to whether or not a speculative thread would execute desirably. The fork predictor may be implemented as a modified branch predictor circuit, and may have execution history updates entered by a determination of whether or not the execution of a speculative thread was or would have been desirable.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: February 20, 2007
    Assignee: Intel Corporation
    Inventors: Kevin W. Rudd, Tin-Fook Ngai
  • Patent number: 7143270
    Abstract: A processor comprising a feature indicator associated with at least one of a first sequence of one or more instructions, a first register, a second register, and an execution core is provided. The execution core is configured to execute a second instruction to cause the first register to be set to a first value using the feature indicator and to cause the second register to be set to a second value using the feature indicator. The execution core is configured to execute the first sequence of one or more instructions to cause a function to be performed in response to the first value in the first register indicating a true condition, and the execution core is configured to execute a second sequence of one or more instructions to cause the function to be performed in response to the second value in the second register indicating the true condition.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: November 28, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin W. Rudd, Allan D. Knies, Dale C. Morris, James M. Hull
  • Publication number: 20030233394
    Abstract: A system and method for determine which threads to execute at a given time in a multi-threaded computer system. A thread prioritizer determines execution fairness between pairs of potentially executing threads. A switch enabler determines forward progress of each executing thread. The resulting indicators from the thread prioritizer and switch enabler may aid in the determination of whether or not to switch a particular potentially executing thread into execution resources.
    Type: Application
    Filed: June 14, 2002
    Publication date: December 18, 2003
    Inventors: Kevin W. Rudd, Udo Walterscheidt