Abstract: A dual mode phone line connectivity mechanism allows POTS access and digital transport access to coexist over the same local loop serving a customer site, while providing a net DS0 data rate for customer data communications (e.g., either 56 kbps or 64 kbps). When the customer's analog device is on-hook, the connectivity mechanism is configured to provide a digital path for the local loop, so that a digital link, exclusive of voice-processing, is established between a terminal adapter (or super-modem) and the service provider's line interface card, which replaces the voice path with a digital transceiver for the duration of the call. Local loop-associated and network-associated switches selectively provide one of two alternative signalling paths—a voice signalling path containing a codec for POTS signalling, and a data signalling path. A loop current detector monitors the local loop, while a network monitor circuit monitors the network for a ring command signal.

Abstract: A method, system and apparatus for decreasing the time frame synchronization and resynchronization in a data communication uses an long frame sync word formed by combining a frame sync word with stuff bits, wherein the stuff bits are necessary for timing adjustments.

Abstract: The range of digital data communication services, such as a basic rate 2B1Q ISDN channel, to customer premises located beyond the industry standard achievable range of a two-wire loop can be extended by increasing the capacity of the ISDN line code from two information bits per symbol to three information bits per symbol, so as to reduce the effective symbol rate, which is error correction encoded to an effective 4B1H line code for defining a sixteen level PAM signal waveform, and employing enhanced low signal-to-noise ratio signal processing techniques in both the transmitter and receiver to accommodate the increased insertion loss of the two-wire line resulting from its extended length. Such enhanced low signal-to-noise ratio signal processing techniques include a Tomlinson precoder in the transmitter, and an adaptive linear equalizer and a module unit in the receiver.

Abstract: An apparatus, method and system are provided for correlated noise reduction, in a trellis decoding environment, such as second generation HDSL, in which crosstalk impairments may be significant. The preferred embodiments provide equalization and correlated noise reduction, utilizing a training period to generate corresponding coefficients, and utilizing two different training error signals. In addition, the apparatus method and system also provide continued and adaptive correlated noise reduction during data transmission, utilizing two additional error signals, a trellis error signal and a tentative error signal. The trellis error signal is a decision error of a selected previous state of a selected trellis path, in which the selected trellis path has a smallest cumulative error of a plurality of trellis paths, and the selected previous state is preferably the immediately previous state.

Abstract: The range of digital data communication services, such as a basic rate 2B1Q ISDN channel, to customer premises located beyond the industry standard achievable range of a two-wire loop can be extended by increasing the capacity of the ISDN line code from two information bits per symbol to three information bits per symbol, so as to reduce the effective symbol rate, which is error correction encoded to an effective 4B1H line code for defining a sixteen level PAM signal waveform, and employing enhanced low signal-to-noise ratio signal processing techniques in both the transmitter and receiver to accommodate the increased insertion loss of the two-wire line resulting from its extended length. Such enhanced low signal-to-noise ratio signal processing techniques include a Tomlinson precoder in the transmitter, and an adaptive linear equalizer and a module unit in the receiver.

Abstract: In a data communication system having a channel with time-varying impairments and further having a transmitter with a precoder, a method and apparatus for updating the precoder coefficients. The method and apparatus is based on the arrangement of a duplicate precoder and correction filter in the receiver, where the correction filter generates incremental coefficients. The incremental coefficients are sent via a back channel to the transmitter and added to the current values of the precoder coefficients. The method and apparatus provide DFE-like performance and do not have the delay problems associated with DFEs.

Abstract: In order to ensure continuous telephone service to a customer premises served by an ISDN line, without requiring that the customer maintain an additional POTS line as an emergency back-up to the normally used ISDN service, ISDN signalling circuits and network termination interface components are modified, so that, in the event of a loss of power to customer premises digital communications equipment, a communication link between an auxiliary POTS telephone and the normal ISDN communication path to the central office may be established. There need not be any modification of the central office switch, per se, so that the integrity of the ISDN communication path with the central office line card remains unaffected. As a result, the central office equipment can continue to conduct standard ISDN communications with the customer premises equipment, even though the customer is employing a POTS back-up analog phone.

Abstract: The range of digital data communication services, such as a basic rate 2B1Q ISDN channel, to customer premises located beyond the industry standard achievable range of a two-wire loop can be extended by increasing the capacity of the ISDN line code from two information bits per symbol to three information bits per symbol, so as to reduce the effective symbol rate, which is error correction encoded to an effective 4B1H line code for defining a sixteen level PAM signal waveform, and employing enhanced low signal-to-noise ratio signal processing techniques in both the transmitter and receiver to accommodate the increased insertion loss of the two-wire line resulting from its extended length. Such enhanced low signal-to-noise ratio signal processing techniques include a Tomlinson precoder in the transmitter, and an adaptive linear equalizer and a module unit in the receiver.

Abstract: In order to ensure continuous telephone service to a customer premises served by an ISDN line, without requiring that the customer maintain an additional POTS line as an emergency back-up to the normally used ISDN service, ISDN signalling circuits and network termination interface components are modified, so that, in the event of a loss of power to customer premises digital communications equipment, a communication link between an auxiliary POTS telephone and the normal ISDN communication path to the central office may be established. There need not be any modification of the central office switch, per se, so that the integrity of the ISDN communication path with the central office line card remains unaffected. As a result, the central office equipment can continue to conduct standard ISDN communications with the customer premises equipment, even though the customer is employing a POTS back-up analog phone.

Abstract: A local subscriber loop architecture embeds digitized POTS signals into the framing format of high bit rate digital subscriber loop signals being transported over a local loop for serving both subscriber digital terminal equipment and a POTS telephone. The remote transceiver unit is line-powered from the central office unit, facilitating installation of a reliable (office-powered) POTS interface (containing codec and subscriber line interface circuitry providing BORSHT functions) into the remote unit. The data rate of the added digital POTS signal is relatively small with respect to the data rate of the DSL channels, so that there is only slight increase in the overall data rate. As a consequence, adding the digital POTS signal has negligible impact on transport range.

Abstract: A limited search variant of the fixed delay tree search detector is used to recover digital signals corrupted with intersymbol interference and additive noise. The limited search algorithm uses a variant of an equalizer decision device--a simple slicer--to reduce the number of paths that are considered by the tree search detector from M.sup.D+1 to either D+1 or 2.sup.D+1 paths, thereby significantly reducing the complexity of the tree-search detector. This limited search detector enjoys negligible loss in performance, compared with that of a full fixed delay tree search.

Abstract: In order to transport digital data across a reliable digital communication link from a transmit site to a destination site, the data is processed in parallel paths to derive error detection information, such as a cyclic redundancy code, and to encode the data. The outputs of the parallel paths are combined into a composite digital data sequence, which is then transmitted over the reliable digital communication link to the destination site. At the destination site, the encoded digital data component of the composite data sequence is decoded and then subjected to the same error detection operation carried out at the transmit site to derive error detection information associated with the decoded digital data. This recalculated error detection information is compared with the error detection information component contained in the composite digital data sequence. If there is a mismatch, the reliable digital communication link and the encoder at the transmit site and the decoder at the destination site are reset.

Abstract: The range of digital data communication services, such as a basic rate 2B1Q ISDN channel, to customer premises located beyond the industry standard achievable range of a two-wire loop can be extended by increasing the capacity of the ISDN line code from two information bits per symbol to three information bits per symbol, so as to reduce the effective symbol rate, which is error correction encoded to an effective 4B1H line code for defining a sixteen level PAM signal waveform, and employing enhanced low signal-to-noise ratio signal processing techniques in both the transmitter and receiver to accommodate the increased insertion loss of the two-wire line resulting from its extended length. Such enhanced low signal-to-noise ratio signal processing techniques include a Tomlinson precoder in the transmitter, and an adaptive linear equalizer and a module unit in the receiver.

Abstract: State of the art data compression-protocol engines provide high compression ratios for improving data transport over a high data rate serial communication link. However, a respective data port of data terminal equipment may not be capable of being clocked at a sufficiently high clock rate, which limits the performance of the data compression-protocol engine, and prevents full utilization of the available bandwidth of the serial link. To remedy this problem, data terminal equipment and data compression-protocol engine components that provide auxiliary data communication port connectivity are employed. Data from the data terminal equipment is clocked to the data compression-protocol engine over a plurality of parallel data paths. This increases the effective clock rate and enables the data compression-protocol engine to output a compressed data stream that fully utilizes the bandwidth of the network.

Abstract: A wander reduction mechanism in an HDSL pulse-stuffing synchronization system provides a more precise measure of the phase of the incoming asynchronous signal than is obtained in conventional schemes, in which the only information available is the presence or absence of stuffing pulses. An auxiliary phase comparator and phase adjuster are incorporated into the synchronizer-multiplexer to generate a reference data clock (derived from the synchronized data clock), so that the incoming unsynchronized data clock can be tracked. As the clock is iteratively phase-adjusted, the respective changes are accumulated. At the end of a prescribed measurement interval, the net contents of the accumulator are encoded and transported over the synchronous digital data communication channel to the receiver.

Abstract: A jitter/wander reduction mechanism monitors the ratio of pulse stuffing, to detect whenever the pulse stuffing ratio is proximate a prescribed undesirable ratio of stuffs per stuffing opportunity, which causes the wander to be a large number of unit intervals. A stuffing pulse accumulator-controlled frequency shift control circuit monitors the signal produced by a multiplexer (and demultiplexer for full duplex mode) control logic circuit and incrementally adjusts, as necessary, the frequency of a synchronized clock signal input to the multiplexer (and demultiplexer). The magnitude of the incremental frequency shift is sufficient to drive the synchronized clock away from the frequency associated with the undesired stuff ratio to a frequency that is sufficiently separated from the undesired value to produce a stuffing ratio other than the undesired value and reduce the jitter/wander.

Abstract: Network bit efficiency for transmitting a limited size data frame over a digital communication system is enhanced by a macro-header encoding mechanism which replaces plural header portions of a data frame sequence with a single macro-header byte. The macro-header may be representative of protocol and signal processing operation fields that would otherwise require a longer overhead sequence as a precursor to data transmission. At the receiver, the macro-code is translated into a predefined sequence of opcodes, parameters and data bytes. Whenever the receiver requires another opcode, parameter or data byte, it initially looks to the macro-code. Otherwise, the necessary byte is obtained from the data frame segment being interpreted.

Abstract: A jitter/wander reduction circuit is provided for a desynchronizer deriving an output clock signal from an independent clock signal and phase adjustment signals. Phase adjustment signals relate to a deviation of the independent clock signal from an input clock signal. The circuit includes a frequency offset estimation circuit receiving phase adjustment signals and providing a frequency offset estimation signal. A phase controller receives the frequency offset estimation signal, provides a feedback signal to the frequency offset estimation circuit, and provides a phase difference signal. A clock generator circuit receives the independent clock signal and the phase difference signal. The independent clock signal is adjusted based on the phase difference signal to provide an output clock signal.

Abstract: The need to employ costly precision components to reduce non-linearities in the signal processing path of noise reduction circuitry such as an echo canceler and decision feedback equalizer is successfully addressed by a transversal filter which is capable of effectively tracking for non-linearities in system components that manifest themselves as added noise introduced into the signal propagation path. This non-linear tracking capability is attained by employing cascaded sets of weighting coefficient and scaling factor multiplying stages. The first set of weighting coefficients effectively modifies the contents of each of the transmitted symbol samples in the transversal filter delay line to produce respective sets of `partial sums` associated with the respective data symbols employed in the data modulation scheme. The second, cascaded set of `scaling` coefficients or factors is employed to scale selected ones of the sets of the partial sums.

Abstract: The need to employ costly precision components to reduce non-linearities in the signal processing path of noise reduction circuitry such as an echo canceler and decision feedback equalizer is successfully addressed by a transversal filter which is capable of effectively tracking for non-linearities in system components that manifest themselves as added noise introduced into the signal propagation path. This non-linear tracking capability is attained by employing cascaded sets of weighting coefficient and scaling factor multiplying stages. The first set of weighting coefficients effectively modifies the contents of each of the transmitted symbol samples in the transversal filter delay line to produce respective sets of `partial sums` associated with the respective data symbols employed in the data modulation scheme. The second, cascaded set of `scaling` coefficients or factors is employed to scale selected ones of the sets of the partial sums.