Patents by Inventor Kevin Wadleigh

Kevin Wadleigh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10540093
    Abstract: The present disclosure is related to multidimensional contiguous memory allocation. Multidimensional contiguous memory allocation can include receiving an allocation request for an amount of memory that is contiguous in a multiple dimensions of the memory and determining whether the memory includes a region corresponding to the requested amount that is a candidate as being unallocated based on information indicating a maximum number of contiguous unallocated allocable portions of the memory. In response to determining that the memory includes the candidate region, the method can include determining whether the candidate region is unallocated based on a subset of information indicating whether each allocable portion of the memory is allocated. The subset of information corresponds to the candidate region only.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: January 21, 2020
    Assignee: Micron Technology, Inc.
    Inventors: John D. Leidel, Kevin Wadleigh
  • Publication number: 20180210660
    Abstract: The present disclosure is related to multidimensional contiguous memory allocation. Multidimensional contiguous memory allocation can include receiving an allocation request for an amount of memory that is contiguous in a multiple dimensions of the memory and determining whether the memory includes a region corresponding to the requested amount that is a candidate as being unallocated based on information indicating a maximum number of contiguous unallocated allocable portions of the memory. In response to determining that the memory includes the candidate region, the method can include determining whether the candidate region is unallocated based on a subset of information indicating whether each allocable portion of the memory is allocated. The subset of information corresponds to the candidate region only.
    Type: Application
    Filed: March 19, 2018
    Publication date: July 26, 2018
    Inventors: John D. Leidel, Kevin Wadleigh
  • Patent number: 9940026
    Abstract: The present disclosure is related to multidimensional contiguous memory allocation. Multidimensional contiguous memory allocation can include receiving an allocation request for an amount of memory that is contiguous in a multiple dimensions of the memory and determining whether the memory includes a region corresponding to the requested amount that is a candidate as being unallocated based on information indicating a maximum number of contiguous unallocated allocable portions of the memory. In response to determining that the memory includes the candidate region, the method can include determining whether the candidate region is unallocated based on a subset of information indicating whether each allocable portion of the memory is allocated. The subset of information corresponds to the candidate region only.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: April 10, 2018
    Assignee: Micron Technology, Inc.
    Inventors: John D. Leidel, Kevin Wadleigh
  • Publication number: 20160098209
    Abstract: The present disclosure is related to multidimensional contiguous memory allocation. Multidimensional contiguous memory allocation can include receiving an allocation request for an amount of memory that is contiguous in a multiple dimensions of the memory and determining whether the memory includes a region corresponding to the requested amount that is a candidate as being unallocated based on information indicating a maximum number of contiguous unallocated allocable portions of the memory. In response to determining that the memory includes the candidate region, the method can include determining whether the candidate region is unallocated based on a subset of information indicating whether each allocable portion of the memory is allocated. The subset of information corresponds to the candidate region only.
    Type: Application
    Filed: October 2, 2015
    Publication date: April 7, 2016
    Inventors: John D. Leidel, Kevin Wadleigh
  • Publication number: 20060075010
    Abstract: A method and apparatus, especially suited for computers that can execute fused multiply-add instructions, for performing a fast Fourier transform (FFT) are disclosed. Divisions by zero that create a risk of error in other methods are avoided. In a first example embodiment, a zero divisor is detected and the division circumvented by performing an alternate computation. In a second example embodiment, a zero divisor is detected replaced by a safe finite value. In a third example embodiment, two optimized FFT kernels are used, one avoiding division by a zero real part of a root of unity and one avoiding division by a zero imaginary part. In a fourth example embodiment, a first kernel computes some kernel iterations without multiplication, and a second, optimized kernel computes the remaining iterations without risk of division by zero.
    Type: Application
    Filed: October 5, 2004
    Publication date: April 6, 2006
    Inventors: Kevin Wadleigh, David Boyd
  • Publication number: 20050033944
    Abstract: A system for performing matrix operations utilizes a processor, memory, and a matrix operation manager. The processor has a memory cache. The memory is external to the processor and stores first and second matrices. The matrix operation manager is configured to mathematically combine the first matrix with the second matrix utilizing a hoisted matrix algorithm for hoisting values of the first matrix, and the hoisted matrix algorithm has an outer loop and an inner loop that is performed to completion for each iteration of the outer loop. The matrix operation manager, for each iteration of the outer loop, is configured to load to the cache and to write to a contiguous portion of the memory, before performing the inner loop, values from the first matrix that are to be combined, via performance of the inner loop, with values from the second matrix.
    Type: Application
    Filed: December 5, 2002
    Publication date: February 10, 2005
    Inventor: Kevin Wadleigh