Patents by Inventor Kevin Wilder
Kevin Wilder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230266899Abstract: Various embodiments include a computer memory system that dynamically adjusts a memory device performance feature, such as dynamic assist control, dynamic turbo mode, and/or the like, to improve the performance of memory devices in the memory system. The memory system enables or disables the memory device performance feature based on the operating voltage relative to a threshold voltage. If the operating voltage crosses the threshold voltage in one direction, then the memory device system enables the memory device performance feature. If the operating voltage crosses the threshold voltage in another direction, then the memory system disables the memory device performance feature. Various techniques enable the memory device performance feature to be employed even with complex integrated circuits that may include tens of thousands of devices that employ the memory device performance feature.Type: ApplicationFiled: February 23, 2022Publication date: August 24, 2023Inventors: Anand Shanmugam SUNDARARAJAN, Narayan KULSHRESTHA, Ka Yun LEE, Brian SMITH, Madhukiran V. SWARNA, Ramachandiran V, Kevin WILDER
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Publication number: 20230121347Abstract: Electromagnetic circuit structures and methods are provided for a circuit board that includes a hole disposed through a substrate to provide access to an electrical component, such as a signal trace line (or stripline), that is at least partially encapsulated (e.g., sandwiched) between substrates. The electrical component includes a portion substantially aligned with the hole, and an electrical conductor is disposed within the hole. The electrical conductor is soldered to the portion of the electrical component.Type: ApplicationFiled: December 20, 2022Publication date: April 20, 2023Inventors: Andrew R. Southworth, Thomas V. Sikina, John P. Haven, James E. Benedict, Kevin Wilder
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Patent number: 11632856Abstract: A circuit assembly is provided and includes a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region, a circuit element disposed within the circuit element region of the PCB; and a Faraday wall. The Faraday wall includes a solid, unitary body having a same shape as the trench. The Faraday wall is disposed within the trench to surround an entirety of the circuit element.Type: GrantFiled: July 2, 2021Date of Patent: April 18, 2023Assignee: RAYTHEON COMPANYInventors: Andrew Southworth, Kevin Wilder, James Benedict, Mary K. Herndon, Thomas V. Sikina, John P. Haven
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Patent number: 11487341Abstract: Systems and techniques for improving the performance of circuits while adapting to dynamic voltage drops caused by the execution of noisy instructions (e.g. high power consuming instructions) are provided. The performance is improved by slowing down the frequency of operation selectively for types of noisy instructions. An example technique controls a clock by detecting an instruction of a predetermined noisy type that is predicted to have a predefined noise characteristic (e.g. a high level of noise generated on the voltage rails of a circuit due to greater amount of current drawn by the instruction), and, responsive to the detecting, deceasing a frequency of the clock. The detecting occurs before execution of the instruction. The changing of the frequency in accordance with instruction type enables the circuits to be operated at high frequencies even if some of the workloads include instructions for which the frequency of operation is slowed down.Type: GrantFiled: July 2, 2019Date of Patent: November 1, 2022Assignee: NVIDIA CORPORATIONInventors: Aniket Naik, Tezaswi Raja, Kevin Wilder, Rajeshwaran Selvanesan, Divya Ramakrishnan, Daniel Rodriguez, Benjamin Faulkner, Raj Jayakar, Fei (Walter) Li
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Patent number: 11482795Abstract: An antenna and method of manufacturing an antenna. The antenna includes a radiator feed layer, a first radiator patch assembly attached to the radiator feed layer, and a second radiator patch assembly attached to the radiator feed layer. The first radiator patch assembly is separated from the second radiator patch assembly by an air gap. The first radiator patch assembly is attached to the radiator feed layer and the second radiator patch assembly is attached to the radiator feed layer separated from the first radiator patch assembly by the air gap.Type: GrantFiled: January 16, 2020Date of Patent: October 25, 2022Assignee: RAYTHEON COMPANYInventors: Thomas V. Sikina, John P. Haven, Gregory M. Fagerlund, James Benedict, Andrew Southworth, Kevin Wilder
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Patent number: 11470725Abstract: An apparatus for automating the fabrication of a copper vertical launch (CVL) within a printed circuit board (PCB) includes a feed mechanism to feed and extrude copper wire from a spool of copper wire and a wire cutting and gripping mechanism to receive copper wire from the feed mechanism, cut and secure a segment of copper wire, insert the segment of copper wire into a hole formed within the PCB, solder an end of the segment of copper wire to a signal trace of the PCB, and flush cut an opposite end of the segment of the copper wire to a surface of the PCB. The wire cutting and gripping mechanism includes a wire cutter to flush cut the segment of copper wire and an integrated heated gripper device to receive the copper wire from the spool of copper wire and cut and grab a segment from copper wire.Type: GrantFiled: August 6, 2021Date of Patent: October 11, 2022Assignee: RAYTHEON COMPANYInventors: Mikhail Pevzner, James E. Benedict, Andrew R. Southworth, Thomas V. Sikina, Kevin Wilder, Matthew Souza, Aaron Michael Torberg
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Patent number: 11444365Abstract: A RAMP-radio frequency (RAMP-RF) assembly is provided and includes an RF panel including a microstrip interface, a plate including a stripline interface and a microstrip-to-stripline transition element operably connectable to the microstrip interface and to the stripline interface.Type: GrantFiled: March 18, 2020Date of Patent: September 13, 2022Assignee: RAYTHEON COMPANYInventors: James Benedict, Erika Klek, John P. Haven, Michael Souliotis, Thomas V. Sikina, Andrew R. Southworth, Kevin Wilder
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Publication number: 20210368629Abstract: An apparatus for automating the fabrication of a copper vertical launch (CVL) within a printed circuit board (PCB) includes a feed mechanism to feed and extrude copper wire from a spool of copper wire and a wire cutting and gripping mechanism to receive copper wire from the feed mechanism, cut and secure a segment of copper wire, insert the segment of copper wire into a hole formed within the PCB, solder an end of the segment of copper wire to a signal trace of the PCB, and flush cut an opposite end of the segment of the copper wire to a surface of the PCB. The wire cutting and gripping mechanism includes a wire cutter to flush cut the segment of copper wire and an integrated heated gripper device to receive the copper wire from the spool of copper wire and cut and grab a segment from copper wire.Type: ApplicationFiled: August 6, 2021Publication date: November 25, 2021Inventors: Mikhail Pevzner, James E. Benedict, Andrew R. Southworth, Thomas V. Sikina, Kevin Wilder, Matthew Souza, Aaron Michael Torberg
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Publication number: 20210337651Abstract: A circuit assembly is provided and includes a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region, a circuit element disposed within the circuit element region of the PCB; and a Faraday wall. The Faraday wall includes a solid, unitary body having a same shape as the trench. The Faraday wall is disposed within the trench to surround an entirety of the circuit element.Type: ApplicationFiled: July 2, 2021Publication date: October 28, 2021Inventors: Andrew Southworth, Kevin Wilder, James Benedict, Mary K. Herndon, Thomas V. Sikina, John P. Haven
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Patent number: 11145952Abstract: A communications array includes a support structure configured to array elements, and a plurality of array elements supported by the support structure. Each array element is fabricated from an advanced manufacturing techniques (AMT) process. The support structure may be fabricated from a printed circuit board (PCB) or similar dielectric material. Each array element may include a radiator and/or a beamformer manufactured using the AMT process. The communications array further may include a copper vertical launch (CVL) and/or an electromagnetic boundary.Type: GrantFiled: November 14, 2019Date of Patent: October 12, 2021Assignee: RAYTHEON COMPANYInventors: Thomas V. Sikina, John P. Haven, Kevin Wilder, James E. Benedict, Andrew R. Southworth, Mary K. Herndon
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Patent number: 11145977Abstract: An array includes a support structure configured to support columns of beamformer assemblies, and a plurality of beamformer assemblies supported by the support structure. Each beamformer assembly includes at least one beamformer having at least one first beamformer segment and at least one second beamformer segment configured to interconnect with the first beamformer segment.Type: GrantFiled: June 14, 2019Date of Patent: October 12, 2021Assignee: RAYTHEON COMPANYInventors: Kevin Wilder, Jonathan E. Nufio-Molina, Phillip W. Thiessen, Thomas V. Sikina, James E. Benedict, Andrew R. Southworth, Erika Klek
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Publication number: 20210296751Abstract: A RAMP-radio frequency (RAMP-RF) assembly is provided and includes an RF panel including a microstrip interface, a plate including a stripline interface and a microstrip-to-stripline transition element operably connectable to the microstrip interface and to the stripline interface.Type: ApplicationFiled: March 18, 2020Publication date: September 23, 2021Inventors: JAMES BENEDICT, Erika Klek, John P. Haven, Michael Souliotis, Thomas V. Sikina, Andrew R. Southworth, Kevin Wilder
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Patent number: 11109489Abstract: An apparatus for automating the fabrication of a copper vertical launch (CVL) within a printed circuit board (PCB) includes a feed mechanism to feed and extrude copper wire from a spool of copper wire and a wire cutting and gripping mechanism to receive copper wire from the feed mechanism, cut and secure a segment of copper wire, insert the segment of copper wire into a hole formed within the PCB, solder an end of the segment of copper wire to a signal trace of the PCB, and flush cut an opposite end of the segment of the copper wire to a surface of the PCB. The wire cutting and gripping mechanism includes a wire cutter to flush cut the segment of copper wire and an integrated heated gripper device to receive the copper wire from the spool of copper wire and cut and grab a segment from copper wire.Type: GrantFiled: August 15, 2019Date of Patent: August 31, 2021Assignee: RAYTHEON COMPANYInventors: Mikhail Pevzner, James E. Benedict, Andrew R. Southworth, Thomas V. Sikina, Kevin Wilder, Matthew Souza, Aaron Michael Torberg
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Patent number: 11089673Abstract: A circuit assembly is provided and includes a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region, a circuit element disposed within the circuit element region of the PCB; and a Faraday wall. The Faraday wall includes a solid, unitary body having a same shape as the trench. The Faraday wall is disposed within the trench to surround an entirety of the circuit element.Type: GrantFiled: July 19, 2019Date of Patent: August 10, 2021Assignee: RAYTHEON COMPANYInventors: Andrew Southworth, Kevin Wilder, James Benedict, Mary K. Herndon, Thomas V. Sikina, John P. Haven
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Publication number: 20210226343Abstract: An antenna and method of manufacturing an antenna. The antenna includes a radiator feed layer, a first radiator patch assembly attached to the radiator feed layer, and a second radiator patch assembly attached to the radiator feed layer. The first radiator patch assembly is separated from the second radiator patch assembly by an air gap. The first radiator patch assembly is attached to the radiator feed layer and the second radiator patch assembly is attached to the radiator feed layer separated from the first radiator patch assembly by the air gap.Type: ApplicationFiled: January 16, 2020Publication date: July 22, 2021Inventors: Thomas V. Sikina, John P. Haven, Gregory M. Fagerlund, James Benedict, Andrew Southworth, Kevin Wilder
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Publication number: 20210151855Abstract: A communications array includes a support structure configured to array elements, and a plurality of array elements supported by the support structure. Each array element is fabricated from an advanced manufacturing techniques (AMT) process. The support structure may be fabricated from a printed circuit board (PCB) or similar dielectric material. Each array element may include a radiator and/or a beamformer manufactured using the AMT process. The communications array further may include a copper vertical launch (CVL) and/or an electromagnetic boundary.Type: ApplicationFiled: November 14, 2019Publication date: May 20, 2021Inventors: Thomas V. Sikina, John P. Haven, Kevin Wilder, James E. Benedict, Andrew R. Southworth, Mary K. Herndon
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Publication number: 20210066830Abstract: A stripline radio-frequency (RF) connection interface is provided and includes first and second printed circuit boards (PCBs). The first PCB includes a first trace, ground planes at opposite sides of the first trace, dielectric material interposed between the first trace and the ground planes and a first end. The first end is formed as a first rabbet at which the first trace is exposed. The second PCB includes a second trace, ground planes at opposite sides of the second trace, dielectric material interposed between the second trace and the ground planes and a second end. The second end is formed as a second rabbet, which is substantially identical to the first rabbet, at which the second trace is exposed. The first and second ends are mated in a shiplap joint to electrically couple the first and second traces.Type: ApplicationFiled: August 27, 2019Publication date: March 4, 2021Inventors: Kevin Wilder, Alan C. Smith, James Benedict, Andrew Southworth, Thomas V. Sikina, Mary K. Herndon, John P. Haven
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Publication number: 20210051805Abstract: An apparatus for automating the fabrication of a copper vertical launch (CVL) within a printed circuit board (PCB) includes a feed mechanism to feed and extrude copper wire from a spool of copper wire and a wire cutting and gripping mechanism to receive copper wire from the feed mechanism, cut and secure a segment of copper wire, insert the segment of copper wire into a hole formed within the PCB, solder an end of the segment of copper wire to a signal trace of the PCB, and flush cut an opposite end of the segment of the copper wire to a surface of the PCB. The wire cutting and gripping mechanism includes a wire cutter to flush cut the segment of copper wire and an integrated heated gripper device to receive the copper wire from the spool of copper wire and cut and grab a segment from copper wire.Type: ApplicationFiled: August 15, 2019Publication date: February 18, 2021Inventors: Mikhail Pevzner, James E. Benedict, Andrew R. Southworth, Thomas V. Sikina, Kevin Wilder, Matthew Souza, Aaron Michael Torberg
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Publication number: 20210022238Abstract: A circuit assembly is provided and includes a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region, a circuit element disposed within the circuit element region of the PCB; and a Faraday wall. The Faraday wall includes a solid, unitary body having a same shape as the trench. The Faraday wall is disposed within the trench to surround an entirety of the circuit element.Type: ApplicationFiled: July 19, 2019Publication date: January 21, 2021Inventors: Andrew Southworth, Kevin Wilder, James Benedict, Mary K. Herndon, Thomas V. Sikina, John P. Haven
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Publication number: 20200395651Abstract: An array includes a support structure configured to support columns of beamformer assemblies, and a plurality of beamformer assemblies supported by the support structure. Each beamformer assembly includes at least one beamformer having at least one first beamformer segment and at least one second beamformer segment configured to interconnect with the first beamformer segment.Type: ApplicationFiled: June 14, 2019Publication date: December 17, 2020Inventors: Kevin Wilder, Jonathan E. Nufio-Molina, Phillip W. Thiessen, Thomas V. Sikina, James E. Benedict, Andrew R. Southworth, Erika Klek