Abstract: A method of manufacturing a PCRAM device includes forming a switching device in a contact hole of a first interlayer insulating layer, forming a second interlayer insulating layer having an opening exposing the switching device, forming a lower electrode pattern along a sidewall of the second interlayer insulating layer to be coupled to the switching device, forming an insulating layer to be buried within the lower electrode pattern, forming a lower electrode by removing an exposed surface of the lower electrode pattern by a set height, wherein a height of a sidewall of the lower electrode is lower than that of the second interlayer insulating layer, forming a phase-change layer filing a hole of the second interlayer insulating layer from which the exposed surface of the lower electrode pattern is removed, and forming an upper electrode on the phase-change layer and a portion of the second interlayer insulating layer.

Abstract: A phase change memory device having an inversely tapered bottom electrode and a method for forming the same is presented. The phase change memory device includes a semiconductor substrate, an insulation layer, a bottom electrode contact and a phase change pattern. The insulation layer includes a bottom electrode contact hole having an insulation sidewall spacer such that the bottom electrode contact hole has an upper portion diameter that is smaller than a lower portion diameter. The bottom electrode contact is formed within the bottom electrode contact hole. The phase change pattern is formed on the bottom electrode contact.

Abstract: A phase change memory device having an inversely tapered bottom electrode and a method for forming the same is presented. The phase change memory device includes a semiconductor substrate, an insulation layer, a bottom electrode contact and a phase change pattern. The insulation layer includes a bottom electrode contact hole having an insulation sidewall spacer such that the bottom electrode contact hole has an upper portion diameter that is smaller than a lower portion diameter. The bottom electrode contact is formed within the bottom electrode contact hole. The phase change pattern is formed on the bottom electrode contact.

Abstract: A method for forming an interlayer insulating film of a semiconductor device comprises forming an active pattern over a substrate, forming a spin-on dielectric film over the substrate including the active pattern, and irradiating an electron beam over the spin on dielectric film to form an interlayer insulating film.

Abstract: A semiconductor device comprises a semiconductor substrate including a scribe lane, and a metal layer disposed over the semiconductor substrate. The metal layer is formed over the overlay vernier by a sputtering method. The overlay vernier comprises a bar type mother vernier formed in the scribe lane. The overlay vernier has a sloped profile.

Abstract: Disclosed is a method for forming metal wiring in a semiconductor device. The method comprises forming a TiN thin layer on a semiconductor substrate by using Ti compound containing a halogen element which corresponds to a 17 group element in the periodic table and NH3 reactant and adsorbing halogen atoms to the surface of the TiN thin layer; and forming a copper (Cu) thin layer on the TiN thin layer by using the adsorbed halogen atoms as catalyst. Wiring can be carried out in situ in a single chamber system in order to obtain excellent interface characteristics and a short process time.

Abstract: Disclosed is a method for forming metal wiring in a semiconductor device. The method comprises forming a TiN thin layer on a semiconductor substrate by using Ti compound containing a halogen element which corresponds to a 17 group element in the periodic table and NH3 reactant and adsorbing halogen atoms to the surface of the TiN thin layer; and forming a copper (Cu) thin layer on the TiN thin layer by using the adsorbed halogen atoms as catalyst. Wiring can be carried out in situ in a single chamber system in order to obtain excellent interface characteristics and a short process time.