Abstract: A scan flop cell and method for making the scan flop cell are provided. The scan flop cell includes a D flip-flop, a scan multiplexer, and a clock multiplexer. The clock multiplexer is configured to receive a functional clock and a scan clock. A scan mode terminal SM is connected to the scan multiplexer to control the clock output of the clock multiplexer. The scan flop cell also preferably includes a data terminal D, a scan input terminal SI, a scan enable terminal SE, a functional clock terminal C, a scan clock terminal SC, and the scan mode terminal SM. Still further, the scan flop cell can be integrated with asynchronous set and/or reset blocking circuitry, which internally converts the asynchronous set and/or reset into synchronous set and/or reset signals.