Abstract: Described herein are methods and devices that employ parallel compression of image data using a lossless compressor and a quantization compressor. As described, the lossless compressor generates a variable length compressed bit stream and the quantization compressor generates a fixed length compressed bit stream. The fixed length bit stream is always equal in size to a size requirement of an output memory block. The variable length bit stream may be stored in the output memory block unless it exceeds the memory requirement in size, in which case the fixed length bit stream may be stored to the output memory block.

Abstract: Described herein are methods and devices that employ parallel compression of image data using a lossless compressor and a quantization compressor. As described, the lossless compressor generates a variable length compressed bit stream and the quantization compressor generates a fixed length compressed bit stream. The fixed length bit stream is always equal in size to a size requirement of an output memory block. The variable length bit stream may be stored in the output memory block unless it exceeds the memory requirement in size, in which case the fixed length bit stream may be stored to the output memory block.

Abstract: Systems and methods for the reduction of motion compensation artifacts in a standard or high resolution image interpolation, more specifically to temporal luminance variation, are described. In one innovative aspect, a method of correcting temporal luminance variation (TLV) artifacts during frame rate conversion is provided. The method includes detecting TLV between a first image and a second image based on edge information, TLV characteristics, and motion estimation information. The method further includes determining the location of TLV artifacts in an interpolated image between the first image and the second image. The method also includes modifying the interpolated image based on the determination.

Abstract: A capacitor bias unit includes a first path (26) having a first impedance (29) and a second path (27) having a low impedance and a switch (31) connected between a voltage reference source and a capacitor (23). The capacitor can either be subjected to normal charge characterisitics or quick charge by closing the switch (31). Maintaining an appropriately charged state on the capacitor (23) aids in preventing netting error voltage steps from introducing DC component signals that adversely effect proper decoding and reception of demodulated data.