Patents by Inventor Khader Mohammad

Khader Mohammad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low power content addressable memory system
    Patent number: 9007799
    Abstract: A content addressable memory (CAM) system includes one or more CAM cells, each including a bit cell to store a bit and a complementary bit, and a compare circuit to compare a reference input to the stored bit and to the stored complementary bit. The compare circuit may be implemented to compare a single-ended reference input to each of the stored bit and the complementary bit. The compare circuit may include a pass circuit to selectively provide the reference input to an output under control of the stored bit and the stored complementary bit, a pull-up circuit to selectively pull-up the output under control of the reference input and the stored complementary bit, and a pull-down circuit to selectively pull-down the output under control of the reference input and the stored bit. The reference input may be provided to multiple CAM cells, which may share compare circuitry.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: April 14, 2015
    Assignee: Intel Corporation
    Inventor: Khader Mohammad
  • LOW POWER CONTENT ADDRESSABLE MEMORY SYSTEM
    Publication number: 20140192580
    Abstract: A content addressable memory (CAM) system includes one or more CAM cells, each including a bit cell to store a bit and a complementary bit, and a compare circuit to compare a reference input to the stored bit and to the stored complementary bit. The compare circuit may be implemented to compare a single-ended reference input to each of the stored bit and the complementary bit. The compare circuit may include a pass circuit to selectively provide the reference input to an output under control of the stored bit and the stored complementary bit, a pull-up circuit to selectively pull-up the output under control of the reference input and the stored complementary bit, and a pull-down circuit to selectively pull-down the output under control of the reference input and the stored bit. The reference input may be provided to multiple CAM cells, which may share compare circuitry.
    Type: Application
    Filed: April 25, 2012
    Publication date: July 10, 2014
    Inventor: Khader Mohammad