Patents by Inventor Khai D. T. Ngo

Khai D. T. Ngo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230207188
    Abstract: The system and method of converting high DC voltage input into low voltage output using DC/DC flyback converter using differential transformation technique. The said system comprises a primary winding of a transformer connected to the positive terminal of a DC supply. A primary power circuit including a MOSFET connected to the drain terminal of the MOSFET. Further, a pair of secondary winding of the transformer provided connected differentially to each other. The output voltage of the secondary side of the converter is based on the turn ratio of primary winding and the two secondary winding, wherein the two secondary windings are connected differentially with opposite polarity to each other.
    Type: Application
    Filed: December 30, 2021
    Publication date: June 29, 2023
    Inventors: Shubham SRIVASTAVA, Mandeep Singh RANA, Santanu K. MISHRA, Khai D.T. NGO
  • Patent number: 8907447
    Abstract: Various methods and systems are provided for power inductors in silicon (PIiS) In one embodiment, a PIiS includes a magnetic core of magnetic material embedded in a silicon substrate, and a conductive winding having a plurality of turns, where adjacent turns of the conductive winding have a space therebetween, and where at least a portion of the magnetic core is encircled by the conductive winding In another embodiment, a DC to DC converter includes a PIiS, which includes a magnetic core of magnetic material embedded in a silicon substrate, a conductive winding having a plurality of turns, where at least a portion of the magnetic core is encircled by the conductive winding, and a cap layer of magnetic material disposed on at least one side of the silicon substrate The DC to DC converter also includes an integrated circuit mounted on the cap layer of the power inductor in silicon.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: December 9, 2014
    Inventors: Mingliang Wang, Huikai Xie, Khai D. T. Ngo
  • Publication number: 20130187255
    Abstract: Various methods and systems are provided for power inductors in silicon (PIiS) In one embodiment, a PIiS includes a magnetic core of magnetic material embedded in a silicon substrate, and a conductive winding having a plurality of turns, where adjacent turns of the conductive winding have a space therebetween, and where at least a portion of the magnetic core is encircled by the conductive winding In another embodiment, a DC to DC converter includes a PIiS, which includes a magnetic core of magnetic material embedded in a silicon substrate, a conductive winding having a plurality of turns, where at least a portion of the magnetic core is encircled by the conductive winding, and a cap layer of magnetic material disposed on at least one side of the silicon substrate The DC to DC converter also includes an integrated circuit mounted on the cap layer of the power inductor in silicon
    Type: Application
    Filed: February 17, 2011
    Publication date: July 25, 2013
    Inventors: Mingliang Wang, Huikai Xie, Khai D.T. Ngo
  • Patent number: 8385047
    Abstract: A multi-layer film-stack and method for forming the multilayer film-stack is given where a series of alternating layers of conducting and dielectric materials are deposited such that the conducting layers can be selectively addressed. The use of the method to form integratable high capacitance density capacitors and complete the formation of an integrated power system-on-a-chip device including transistors, conductors, inductors, and capacitors is also given.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: February 26, 2013
    Assignee: University of Florida Research Foundation, Inc.
    Inventors: Huikai Xie, Khai D. T. Ngo
  • Patent number: 7704868
    Abstract: Methods of fabricating micro-electromechanical system devices from complementary metal oxide semiconductors (CMOS) are provided.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: April 27, 2010
    Assignee: University of Florida Research Foundation, Inc.
    Inventors: Huikai Xie, Khai D. T. Ngo
  • Publication number: 20080169553
    Abstract: A method of fabricating a micro-electromechanical system (MEMS) device from a complementary metal oxide semiconductor (CMOS) having a silicon layer and an oxide layer, the oxide layer being on the silicon layer and containing at least one metal layer. The method includes etching the silicon layer of the CMOS to form a trench through the silicon layer to expose a portion of the oxide layer. The method also includes depositing a silicon oxide layer on the silicon layer and on an exposed portion of the oxide layer within the trench. Additionally, the method includes etching the silicon oxide layer deposited on the exposed portion of the oxide layer to expose a portion of the metal within the oxide layer. The method further includes electrodepositing a conductor within the trench such that the conductor extends through the trench to the exposed portion of the metal and etching the silicon layer of the CMOS to remove portions of the silicon layer adjacent the conductor.
    Type: Application
    Filed: April 11, 2006
    Publication date: July 17, 2008
    Applicant: University of Florida Research Foundation, Inc.
    Inventors: Huikai Xie, Khai D.T. Ngo
  • Patent number: 6954025
    Abstract: An integrated MEMS resonant generator system includes a substrate, a plurality of piezoelectric micro generators disposed on the substrate, the micro generators each generating a voltage output in response to vibrational energy received, and at least one power processor disposed on the substrate. The power processor electrically coupled to outputs of the plurality of micro generators. When the input conditions change, the power processor can dynamically adjust its switching functions to optimize the power delivered to a load or energy storage reservoir.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: October 11, 2005
    Assignee: University of Florida Research Foundation, Inc.
    Inventors: Toshikazu Nishida, Louis N. Cattafesta, III, Mark Sheplak, Khai D. T. Ngo
  • Publication number: 20040007942
    Abstract: An integrated MEMS resonant generator system includes a substrate, a plurality of piezoelectric micro generators disposed on the substrate, the micro generators each generating a voltage output in response to vibrational energy received, and at least one power processor disposed on the substrate. The power processor electrically coupled to outputs of the plurality of micro generators. When the input conditions change, the power processor can dynamically adjust its switching functions to optimize the power delivered to a load or energy storage reservoir.
    Type: Application
    Filed: May 13, 2003
    Publication date: January 15, 2004
    Inventors: Toshikazu Nishida, Louis N. Cattafesta, Mark Sheplak, Khai D. T. Ngo
  • Patent number: 5017902
    Abstract: A conductive film magnetic component such as an inductor or transformer includes a conductive film winding having a generally serpentine configuration when disposed in a plane. This film is folded to form a stack of layers with each "layer" comprising part of a winding turn and with successive "layers" connected at the folds via the continuous conductive film. The conductive film may be self-supporting and coated with a dielectric layer or may be disposed on a dielectric membrane. The film and membrane are preferably patterned photolithographically.
    Type: Grant
    Filed: May 30, 1989
    Date of Patent: May 21, 1991
    Assignee: General Electric Company
    Inventors: Alexander J. Yerman, Khai D. T. Ngo
  • Patent number: 4965709
    Abstract: A pseudo-resonant DC link for coupling direct current from a DC source to an inverter includes a plurality of switches which are controlled so as to minimize switching loss in the DC link and in the inverter. The DC link includes a capacitor and an inductor coupled through controllable switches in a manner that momentarily reduces to zero the input voltage to the inverter each time that a switch in the inverter is commutated. The controllable switches in the DC link function to allow the capacitor to resonate through the inductor and then be recharged at the end of a commutation interval. The controllable switches in the DC link are timed to that switching generally occurs under conditions of zero current.
    Type: Grant
    Filed: September 25, 1989
    Date of Patent: October 23, 1990
    Assignee: General Electric Company
    Inventor: Khai D. T. Ngo
  • Patent number: 4949217
    Abstract: A multilayer capacitor comprises stacked, spaced-apart electrodes of sheet form, dielectric layers between the electrodes, and first and second groups of spaced-apart conductive vias extending transversely of the sheet-form electrodes and through aligned holes in the dielectric layers. Alternate electrodes are instantaneously positive, and the remaining electrodes are instantaneously negative. Each via of the first group is electrically connected to the positive electrodes and passes insulatingly through the negative electrodes. Similarly, each via of the second group is electrically connected to the negative electrodes and passes insulatingly through the positive electrodes. Each via has, in the plane of the electrodes, a cross-sectional form in the shape of an elongated rib of greater length than width.
    Type: Grant
    Filed: June 23, 1989
    Date of Patent: August 14, 1990
    Assignee: General Electric Company
    Inventor: Khai D. T. Ngo
  • Patent number: 4943793
    Abstract: A dual-permeability magnetic core structure is provided for use in small, high-frequency inductors and transformers. The dual-permeability corer encloses a winding window containing planar windings and comprises high-permeability and low-permeability sections positioned to produce a highly uniform, or uniformly varying, magnetic field on the winding surfaces. The dual-permeability core produces low winding losses and a low AC-to-DC resistance ratio. Fabrication of the dual-permeability core involves a method of controlling the permeability of a magnetic material and a method of combining structures of two different permeability values.
    Type: Grant
    Filed: December 27, 1988
    Date of Patent: July 24, 1990
    Assignee: General Electric Company
    Inventors: Khai D. T. Ngo, Richard J. Charles
  • Patent number: 4912622
    Abstract: A control circuit for a full bridge switching converter including power FET switching devices. The control circuit including a gate driver with a voltage sensor circuit which senses the precise instant to gate the power FET on in order to achieve substantially lossless switching by the converter.
    Type: Grant
    Filed: March 7, 1988
    Date of Patent: March 27, 1990
    Assignee: General Electric Company
    Inventors: Robert L. Steigerwald, Khai D. T. Ngo
  • Patent number: 4903189
    Abstract: A synchronous rectifier is able to operate at higher frequencies and provides an output having lower noise than prior art FET synchronous rectifier system by using field effect switching devices which contain only one conductivity type of semiconductor material and connecting a high speed, low charge storage diode in parallel. Schottky diodes are preferred whereby there is no junction diode in the structure. Conventional FETs may be used when paralleled with a Schottky diode which prevents the FET's parasitic internal diode from becoming conductive.
    Type: Grant
    Filed: April 27, 1988
    Date of Patent: February 20, 1990
    Assignee: General Electric Company
    Inventors: Khai D. T. Ngo, Robert L. Steigerwald, John P. Walden, Bantval J. Baliga, Charles S. Korman, Hsueh-Rong Chang
  • Patent number: 4894763
    Abstract: A power conversion system for converting polyphase AC power at a first frequency and voltage to AC power at a second frequency and voltage includes an input rectifier circuit and an output inverter circuit coupled by a DC link or interface comprising solid state devices. The interface includes a reversely-poled diodes connected between selected terminals of the rectifier and inverter circuits for carrying current in a forward direction. Controllable switches interconnect the same terminals for carrying current in a reverse direction to the inverter circuit. A controller responds to instantaneous current at the inverter terminals and to instantaneous input line voltages for selectively energizing the interface switches.
    Type: Grant
    Filed: December 5, 1988
    Date of Patent: January 16, 1990
    Assignee: General Electric Company
    Inventor: Khai D. T. Ngo
  • Patent number: 4864479
    Abstract: A full bridge integrable dc-to-dc converter is described which includes four FET switching devices wherein the parasitic capacitors of the switching devices exchange energy with the leakage and magnetizing inductances of the converter transformer. Since energy is exchanged between the passive components of the circuit, the switching is accomplished in a substantially lossless manner. Energy not transmitted to the load is returned to the source rather than being dissipated in the active devices of the converter. Further, single frequency operation is accomplished over a broad range of output conditions by phase shifting the converter legs relative to one another.
    Type: Grant
    Filed: April 28, 1988
    Date of Patent: September 5, 1989
    Assignee: General Electric Company
    Inventors: Robert L. Steigerwald, Khai D. T. Ngo
  • Patent number: 4709316
    Abstract: The leakage inductance of the isolation transformer of a single-ended DC-to-DC converter resonates with a resonant capacitor connected in series with the transformer secondary to provide substantially zero current in the switching transistor during turn-on and turn-off. The overall transistor current stress is low since it is bounded by the sum of average input current and average output current. These factors allow the converter to be operated at high frequencies for improved performance.
    Type: Grant
    Filed: December 27, 1985
    Date of Patent: November 24, 1987
    Assignee: General Electric Company
    Inventors: Khai D. T. Ngo, William A. Peterson