Abstract: Apparatus and methods for biasing power amplifiers are provided herein. In certain embodiments, a power amplifier includes a bipolar transistor having a base biased by a bias network having a reactance that controls an impedance at the transistor base to achieve substantially flat phase response over large dynamic power levels. For example, the bias network can have a frequency response, such as a high-pass or band-pass response, that reduces the impact of power level on phase distortion (AM/PM).

Abstract: Apparatus and methods for biasing power amplifiers are provided herein. In certain embodiments, a power amplifier includes a bipolar transistor having a base biased by a bias network having a reactance that controls an impedance at the transistor base to achieve substantially flat phase response over large dynamic power levels. For example, the bias network can have a frequency response, such as a high-pass or band-pass response, that reduces the impact of power level on phase distortion (AM/PM).

Abstract: A transistor device includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

Abstract: An envelope tracking system has an envelope tracker that is configured to generate a power amplifier supply voltage that changes is relation to an envelope of a radio frequency signal, and a power amplifier comprises at least a first amplification stage having an input terminal receiving a radio frequency (RF) signal to be amplified. The power amplifier has a first coupling unit, and a second coupling unit inductively coupled with the first coupling unit, the second coupling unit provides radio frequency-coupled feedback to the input terminal of the first amplification stage through a radio frequency-coupled feedback path.

Abstract: A power amplifier comprises a first amplification stage having an input terminal receiving a radio frequency (RF) signal to be amplified and having a first coupling unit, a second amplification stage outputting an amplified radio frequency signal and having a second coupling unit and a third coupling unit providing RF feedback to the input terminal of the first amplification stage through an RF feedback path, the second coupling unit being coupled to the first coupling unit, and the third coupling unit being coupled to the first coupling unit.

Abstract: A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

Abstract: In some embodiments, stability in power amplifiers can be achieved under high out-of-band voltage standing wave ratio condition, with an amplifier circuit that includes an amplifier having a first stage and a second stage, with each stage including an input and an output, such that the output of the first stage is coupled to the input of the second stage. The amplifier circuit further includes a stabilizing circuit implemented on the output side of the second stage and configured to provide stability in operation of the amplifier under a high out-of-band voltage standing wave ratio condition.

Abstract: In some embodiments, stability in power amplifiers can be achieved under high in-band voltage standing wave ratio condition, with an amplifier circuit that includes an amplifier having a first stage and a second stage, with each stage including an input and an output, such that the output of the first stage is coupled to the input of the second stage. The amplifier circuit further includes a stabilizing circuit implemented on the input side of the second stage and configured to provide stability in operation of the amplifier under a high in-band voltage standing wave ratio condition.

Abstract: In some embodiments, stability in power amplifiers can be achieved under high voltage standing wave ratio conditions, with an amplifier circuit that includes an amplifier having a selected stage among a plurality of stages, and either or both of a first stabilizing circuit implemented on an input side of the selected stage to provide stability in operation of the amplifier under a high in-band voltage standing wave ratio condition, and a second stabilizing circuit implemented on an output side of the selected stage to provide stability in operation of the amplifier under a high out-of-band voltage standing wave ratio condition.

Abstract: A transistor device includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

Abstract: Apparatus and methods for biasing power amplifiers are provided herein. In certain embodiments, a power amplifier includes a bipolar transistor having a base biased by a bias network having a reactance that controls an impedance at the transistor base to achieve substantially flat phase response over large dynamic power levels. For example, the bias network can have a frequency response, such as a high-pass or band-pass response, that reduces the impact of power level on phase distortion (AM/PM).

Abstract: Apparatus and methods for biasing power amplifiers are provided herein. In certain embodiments, a power amplifier includes a bipolar transistor having a base biased by a bias network having a reactance that controls an impedance at the transistor base to achieve substantially flat phase response over large dynamic power levels. For example, the bias network can have a frequency response, such as a high-pass or band-pass response, that reduces the impact of power level on phase distortion (AM/PM).

Abstract: A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

Abstract: Apparatus and methods for biasing power amplifiers are provided herein. In certain embodiments, a power amplifier includes a bipolar transistor having a base biased by a bias network having a reactance that controls an impedance at the transistor base to achieve substantially flat phase response over large dynamic power levels. For example, the bias network can have a frequency response, such as a high-pass or band-pass response, that reduces the impact of power level on phase distortion (AM/PM).

Abstract: A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

Abstract: A packaged transistor amplifier includes a package having an input lead and an output lead; a transistor stage having a plurality of unit cell transistors that are electrically coupled to the input lead in parallel, each of the unit cell transistors having an output; a first output bond pad that is coupled to a first subset of the outputs of the unit cell transistors by a first feed network; a second output bond pad that is separate from the first output bond pad, the second output bond pad coupled to a second subset of the outputs of the unit cell transistors by a second feed network; a first output bond wire coupled between the first output bond pad and the output lead; and a second output bond wire coupled between the second output bond pad and the output lead. Related design methods are also provided.

Abstract: A packaged transistor amplifier includes a package having an input lead and an output lead; a transistor stage having a plurality of unit cell transistors that are electrically coupled to the input lead in parallel, each of the unit cell transistors having an output; a first output bond pad that is coupled to a first subset of the outputs of the unit cell transistors by a first feed network; a second output bond pad that is separate from the first output bond pad, the second output bond pad coupled to a second subset of the outputs of the unit cell transistors by a second feed network; a first output bond wire coupled between the first output bond pad and the output lead; and a second output bond wire coupled between the second output bond pad and the output lead. Related design methods are also provided.

Abstract: A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

Abstract: A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.

Abstract: A transistor includes a plurality of gate fingers that extend in a first direction and are spaced apart from each other in a second direction, each of the gate fingers comprising at least spaced-apart and generally collinear first and second gate finger segments that are electrically connected to each other. The first gate finger segments are separated from the second gate finger segments in the first direction by a gap region that extends in the second direction. A resistor is disposed in the gap region.