Patents by Inventor Khaled Mahmoud Abdelfattah Aly

Khaled Mahmoud Abdelfattah Aly has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230291402
    Abstract: An aspect relates to an apparatus including a first pair of switching devices configured to selectively couple an application processor to a Universal Serial Bus (USB) differential data transmission lines; a USB host port connector coupled to the USB differential data transmission lines; a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines; and an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively.
    Type: Application
    Filed: May 18, 2023
    Publication date: September 14, 2023
    Inventors: Vijayakumar DHANASEKARAN, Khaled Mahmoud ABDELFATTAH ALY
  • Patent number: 11689201
    Abstract: An aspect relates to an apparatus including a first pair of switching devices configured to selectively couple an application processor to a Universal Serial Bus (USB) differential data transmission lines; a USB host port connector coupled to the USB differential data transmission lines; a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines; and an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: June 27, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Vijayakumar Dhanasekaran, Khaled Mahmoud Abdelfattah Aly
  • Publication number: 20230024172
    Abstract: An aspect relates to an apparatus including a first pair of switching devices configured to selectively couple an application processor to a Universal Serial Bus (USB) differential data transmission lines; a USB host port connector coupled to the USB differential data transmission lines; a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines; and an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively.
    Type: Application
    Filed: July 26, 2021
    Publication date: January 26, 2023
    Inventors: Vijayakumar DHANASEKARAN, Khaled Mahmoud ABDELFATTAH ALY
  • Patent number: 11533011
    Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for driving haptic actuators. An example actuator driver circuit generally includes a driver and calibration circuitry. The driver has at least one output for coupling to at least one input of an actuator. The calibration circuitry is configured to: detect a phase of a voltage signal at the at least one output of the driver, detect a phase of a current signal at the at least one output of the driver, determine a phase difference between the phase of the voltage signal and the phase of the current signal, and adjust a frequency of an oscillating signal for the driver, based at least in part on the phase difference.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: December 20, 2022
    Assignee: QUALCOMM Incorporated
    Inventor: Khaled Mahmoud Abdelfattah Aly
  • Publication number: 20220302884
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier.
    Type: Application
    Filed: June 3, 2022
    Publication date: September 22, 2022
    Inventors: Khaled Mahmoud ABDELFATTAH ALY, Sherif GALAL, Xin FAN
  • Publication number: 20220263471
    Abstract: An apparatus is disclosed for reducing resistor conductivity modulation during amplification. In an example aspect, the apparatus includes a power amplifier circuit comprising a first pair of resistors, a digital-to-analog converter comprising a second pair of resistors, a reference generation circuit comprising a third pair of resistors, and a scaling circuit. The scaling circuit is configured to accept a common-mode reference voltage and a common-mode output voltage. The scaling circuit is also configured to provide a first voltage at body terminals of the first pair of resistors, a second voltage at body terminals of the second pair of resistors, and a third voltage at body terminals of the third pair of resistors such that a summation of the first voltage and the third voltage reduced by the second voltage is approximately equal to an average of the common-mode reference voltage and the common-mode output voltage.
    Type: Application
    Filed: August 22, 2019
    Publication date: August 18, 2022
    Inventors: Khaled Mahmoud Abdelfattah Aly, Chaoli Zhong, Dongyang Tang
  • Patent number: 11374542
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: June 28, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Khaled Mahmoud Abdelfattah Aly, Sherif Galal, Xin Fan
  • Publication number: 20210281202
    Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for driving haptic actuators. An example actuator driver circuit generally includes a driver and calibration circuitry. The driver has at least one output for coupling to at least one input of an actuator. The calibration circuitry is configured to: detect a phase of a voltage signal at the at least one output of the driver, detect a phase of a current signal at the at least one output of the driver, determine a phase difference between the phase of the voltage signal and the phase of the current signal, and adjust a frequency of an oscillating signal for the driver, based at least in part on the phase difference.
    Type: Application
    Filed: March 4, 2020
    Publication date: September 9, 2021
    Inventor: Khaled Mahmoud ABDELFATTAH ALY
  • Publication number: 20210265958
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier.
    Type: Application
    Filed: February 24, 2020
    Publication date: August 26, 2021
    Inventors: Khaled Mahmoud ABDELFATTAH ALY, Sherif GALAL, Xin FAN
  • Patent number: 11068228
    Abstract: An audio codec system includes an audio driver path coupled to a first node of the audio codec system. A first terminal of a sense resistor external to the audio codec system is coupled to the first node and a second terminal of the sense resistor is coupled to an auxiliary device load. The audio codec system includes a second path having a first bias circuit, a second bias circuit and an off-chip voltage reference. The first bias circuit is coupled to a second node of the audio codec system. The second bias circuit is coupled to a third node of the audio codec system. The off-chip voltage reference is associated with the auxiliary device load coupled between the first bias circuit and the second bias circuit.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: July 20, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Khaled Mahmoud Abdelfattah Aly, David Ta-hsiang Lin
  • Publication number: 20200310740
    Abstract: An audio codec system includes an audio driver path coupled to a first node of the audio codec system. A first terminal of a sense resistor external to the audio codec system is coupled to the first node and a second terminal of the sense resistor is coupled to an auxiliary device load. The audio codec system includes a second path having a first bias circuit, a second bias circuit and an off-chip voltage reference. The first bias circuit is coupled to a second node of the audio codec system. The second bias circuit is coupled to a third node of the audio codec system. The off-chip voltage reference is associated with the auxiliary device load coupled between the first bias circuit and the second bias circuit.
    Type: Application
    Filed: March 27, 2020
    Publication date: October 1, 2020
    Inventors: Khaled Mahmoud ABDELFATTAH ALY, David Ta-hsiang LIN
  • Patent number: 9331655
    Abstract: A device for grounding pop-click noise may include an output block configured to generate an output signal at an output node. A switch circuit coupled to the output node may be configured to be operable to couple the output node to a ground potential. The switch circuit may include a first and a second transistor. A drain, a source, and a gate node of the first transistor may be coupled to the output node, a drain node of the second transistor, and a first control signal, respectively. A drain, a source, and a gate node of the second transistor may be coupled to a source node of the first transistor, the ground potential, and a second control signal, respectively. The first and the second control signals may operate the switch circuit to couple the output node to the ground potential during a pre-determined period associated with the pop-click noise.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: May 3, 2016
    Assignee: Broadcom Corporation
    Inventors: Yang Xu, Dale George Frederick Stubbs, Khaled Mahmoud Abdelfattah Aly
  • Patent number: 9264032
    Abstract: Various examples are provided for voltage protection of semiconductor devices. In one example, among others, a circuit includes a MOS device, a protective device connected between the MOS device and an output voltage connection, and gate protection circuitry configured to provide a bias voltage to a gate of the protective device. The bias voltage includes a DC bias component and an AC bias component that synchronously varies with a voltage of the output voltage connection. Another example includes a plurality of protective devices connected between the MOS device and the output voltage connection. The gate protection circuitry may be configured to provide a plurality of bias voltages to the plurality of protective devices. In another example, a method includes attenuating an output voltage, combining the attenuated output voltage with a constant offset voltage to generate a gate bias voltage, and providing the gate bias voltage to a protective device.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: February 16, 2016
    Assignee: BROADCOM CORPORATION
    Inventor: Khaled Mahmoud Abdelfattah Aly
  • Publication number: 20150016630
    Abstract: A device for grounding pop-click noise may include an output block configured to generate an output signal at an output node. A switch circuit coupled to the output node may be configured to be operable to couple the output node to a ground potential. The switch circuit may include a first and a second transistor. A drain, a source, and a gate node of the first transistor may be coupled to the output node, a drain node of the second transistor, and a first control signal, respectively. A drain, a source, and a gate node of the second transistor may be coupled to a source node of the first transistor, the ground potential, and a second control signal, respectively. The first and the second control signals may operate the switch circuit to couple the output node to the ground potential during a pre-determined period associated with the pop-click noise.
    Type: Application
    Filed: September 6, 2013
    Publication date: January 15, 2015
    Applicant: BROADCOM CORPORATION
    Inventors: Yang XU, Dale George Frederick Stubbs, Khaled Mahmoud Abdelfattah Aly
  • Publication number: 20140376139
    Abstract: Various examples are provided for voltage protection of semiconductor devices. In one example, among others, a circuit includes a MOS device, a protective device connected between the MOS device and an output voltage connection, and gate protection circuitry configured to provide a bias voltage to a gate of the protective device. The bias voltage includes a DC bias component and an AC bias component that synchronously varies with a voltage of the output voltage connection. Another example includes a plurality of protective devices connected between the MOS device and the output voltage connection. The gate protection circuitry may be configured to provide a plurality of bias voltages to the plurality of protective devices. In another example, a method includes attenuating an output voltage, combining the attenuated output voltage with a constant offset voltage to generate a gate bias voltage, and providing the gate bias voltage to a protective device.
    Type: Application
    Filed: June 26, 2013
    Publication date: December 25, 2014
    Inventor: Khaled Mahmoud Abdelfattah Aly