Abstract: A system for collecting information through a plant includes a first remote detecting device attached to a first portion of the plant and configured to transmit a given signal directly through the plant; the plant, which constitutes a communication channel; a second remote detecting device attached to a second portion of the plant, which is different from the first portion, and configured to receive a signal indicative of the transmitted given signal; and a sink node that communicates with the second remote detecting device.

Abstract: A gas sensor includes a gate electrode; a dielectric layer covering one surface of the gate electrode; an indium (In) gallium (Ga) zinc (Zn) oxide (O) (IGZO) thin-film formed over the dielectric layer, and first and second metallic electrodes formed on a surface of the IGZO thin-film to act as source and drain, respectively. The IGZO thin-film has an In concentration of 11%+/?3%, Ga concentration of 11%+/?3%, Zn concentration of 7%+/?3%, and O concentration of 71%+/?3%, with a sum of the concentrations being 100%, and the gas interacts with the IGZO thin-film and changes a current through the IGZO thin-film.

Abstract: A biomarker detection sensor includes a substrate; a working electrode formed by laser-scribing directly into the substrate so that a material of the substrate is transformed into graphene; a metal nanostructure formed on a graphene surface of the working electrode, wherein the metal nanostructure is shaped as a tree with plural branches extending away from the graphene surface; an aptamer covering a first surface area of the metal nanostructure; a reference electrode; and a counter electrode.

Abstract: A system for collecting information through a plant includes a first remote detecting device attached to a first portion of the plant and configured to transmit a given signal directly through the plant; the plant, which constitutes a communication channel; a second remote detecting device attached to a second portion of the plant, which is different from the first portion, and configured to receive a signal indicative of the transmitted given signal; and a sink node that communicates with the second remote detecting device.

Abstract: An NO2 detection device includes a substrate; a drain formed on the substrate; a source formed on the substrate; a p-type polymer semiconductor layer formed on the substrate, between the drain and the source; and an n-type metal-organic framework layer located over the p-type polymer semiconductor layer. The n-type metal-organic framework layer has apertures having a size larger than a size of the NO2 molecules so that the NO2 molecules pass through the n-type metal-organic framework layer to arrive at the p-type polymer semiconductor layer to increase an electrical current.

Abstract: A gas sensor includes a gate electrode; a dielectric layer covering one surface of the gate electrode; an indium (In) gallium (Ga) zinc (Zn) oxide (O) (IGZO) thin-film formed over the dielectric layer, and first and second metallic electrodes formed on a surface of the IGZO thin-film to act as source and drain, respectively. The IGZO thin-film has an In concentration of 11%+/?3%, Ga concentration of 11%+/?3%, Zn concentration of 7%+/?3%, and 0 concentration of 71%+/?3%, with a sum of the concentrations being 100%, and the gas interacts with the IGZO thin-film and changes a current through the IGZO thin-film.

Abstract: In accordance with the present disclosure, one embodiment includes a memristor that is caused to be in a particular resistance state by a voltage applied across terminals of the memristor. A first logical input and a second logical input that are below a threshold voltage of the memristor are applied to a first terminal of the memristor. A first control input and a second control input are applied to a second terminal of the memristor. A logical output is determined based on a resistance state of the memristor.

Abstract: Circuitry and techniques are described herein for performing accurate and low power conversion of an analog value into a digital value. According to some aspects, this disclosure describes a successive approximation register (SAR) analog to digital converter (ADC). According to some aspects the SAR ADC comprises an active integrator between a sample and hold stage and a comparator stage. The active integrator operates differently dependent on whether the SAR ADC is operated in a sample phase or a conversion phase. According to other aspects, the SAR ADC utilizes a ring oscillator-based comparator to compare a sampled analog input value to a plurality of reference values to determine a digital value representing the analog value.

Abstract: A self-biased rectifier circuit includes first and second input terminals and first and second output terminals. The self-biased rectifier circuit also includes a rectifier having first, second, third, and fourth transistors, each having a source, gate, and drain. The sources of the first and second transistors and the gates of the third and fourth transistors are coupled to the first input terminal. The sources of the third and fourth transistors and the gates of the first and second transistors are coupled to the second input terminal. The drains of the first and third transistors are coupled to the second output terminal. The drains of the second and fourth transistors are coupled to the first output terminal. A feedback circuit includes a plurality of transistors configured as at least one rectifier.

Abstract: Circuitry and techniques are described herein for performing accurate and low power conversion of an analog value into a digital value. According to some aspects, this disclosure describes a successive approximation register (SAR) analog to digital converter (ADC). According to some aspects the SAR ADC comprises an active integrator between a sample and hold stage and a comparator stage. The active integrator operates differently dependent on whether the SAR ADC is operated in a sample phase or a conversion phase. According to other aspects, the SAR ADC utilizes a ring oscillator-based comparator to compare a sampled analog input value to a plurality of reference values to determine a digital value representing the analog value.

Abstract: In accordance with the present disclosure, one embodiment includes a memristor that is caused to be in a particular resistance state by a voltage applied across terminals of the memristor. A first logical input and a second logical input that are below a threshold voltage of the memristor are applied to a first terminal of the memristor. A first control input and a second control input are applied to a second terminal of the memristor. A logical output is determined based on a resistance state of the memristor.

Abstract: In accordance with the present disclosure, one embodiment includes a memristor that is caused to be in a particular resistance state by a voltage applied across terminals of the memristor. A first logical input and a second logical input that are below a threshold voltage of the memristor are applied to a first terminal of the memristor. A first control input and a second control input are applied to a second terminal of the memristor. A logical output is determined based on a resistance state of the memristor.

Abstract: In accordance with the present disclosure, one embodiment includes a memristor that is caused to be in a particular It resistance state by a voltage applied across terminals of the memristor. A first logical input and a second logical input that are below a threshold voltage of the memristor are applied to a first terminal of the memristor. A first control input and a second control input are applied to a second terminal of the memristor. A logical output is determined based on a resistance state of the memristor.

Abstract: A microelectromechanical system (MEMS) switch with liquid dielectric and a method of fabrication thereof are provided. In the context of the MEMS switch, a MEMS switch is provided including a cantilevered source switch, a first actuation gate disposed parallel to the cantilevered source switch, a first drain disposed parallel to a movable end of the cantilevered source switch, and a liquid dielectric disposed within a housing of the microelectromechanical system switch.

Abstract: Various examples are provided examples related to resistive content addressable memory (RCAM) based in-memory computation architectures. In one example, a system includes a content addressable memory (CAM) including an array of cells having a memristor based crossbar and an interconnection switch matrix having a gateless memristor array, which is coupled to an output of the CAM. In another example, a method, includes comparing activated bit values stored a key register with corresponding bit values in a row of a CAM, setting a tag bit value to indicate that the activated bit values match the corresponding bit values, and writing masked key bit values to corresponding bit locations in the row of the CAM based on the tag bit value.

Abstract: Methods are provided for mitigating problems caused by sneak-paths current during memory cell access in gateless arrays. Example methods contemplated herein utilize adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer memory system to address this sneak-paths problem. The method of the invention is a method for reading a target memory cell located at an intersection of a target row of a gateless array and a target column of the gateless array, the method comprising: —reading a value of the target memory cell; and—calculating an actual value of the target memory cell based on the read value of the memory cell and a component of the read value caused by sneak path current. Utilizing either an “initial bits” strategy or a “dummy bits” strategy in order to calculate the component of the read value caused by sneak path current, example embodiments significantly reduce the number of memory accesses pixel for an array readout.

Abstract: Various examples are provided related to radio frequency (RF) to direct current (DC) power conversion. In one example, a RF-to-DC converter includes a fully cross-coupled rectification circuit including a pair of forward rectifying transistors and a feedback circuit configured to provide feedback bias signals to gates of the pair of forward rectifying transistors via feedback branch elements. In another example, a method includes receiving a radio frequency (RF) signal; rectifying the RF signal via a fully cross-coupled rectification circuit including a pair of forward rectifying transistors; and providing a DC output voltage from an output connection of the fully cross-coupled rectification circuit, where gating of the pair of forward rectifying transistors is controlled by feedback bias signals provided to gates of the pair of forward rectifying transistors via feedback branch elements.

Abstract: A method for readout of a gated memristor array, a memristor array readout circuit and method of fabrication thereof are provided. In the context of the method, the method includes selecting a row of a memristor array associated with a desired cell, measuring the value of the selected memristor row, and selecting a column of a memristor array associated with the desired cell. The selection of the column and selection of the row selects the desired cell. The method also includes measuring the value of the memristor selected row with the selected desired cell and determining the value of the desired cell based on the value of the selected memristor row and the value of the selected memristor row with the selected desired cell.

Abstract: Methods of fabricating devices vial selective laser etching are provided. The methods can include selective laser etching of a portion of a metal layer, e.g. using a laser light source having a wavelength of 1,000 nm to 1,500 nm. The methods can be used to fabricate a variety of features, including an electrode, an interconnect, a channel, a reservoir, a contact hole, a trench, a pad, or a combination thereof. A variety of devices fabricated according to the methods are also provided. In some aspects, capacitive humidity sensors are provided that can be fabricated according to the provided methods. The capacitive humidity sensors can be fabricated with intricate electrodes, e.g. having a fractal pattern such as a Peano curve, a Hilbert curve, a Moore curve, or a combination thereof.

Abstract: Methods are provided for mitigating problems caused by sneak-paths current during memory cell access in gateless arrays. Example methods contemplated herein utilize adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer memory system to address this sneak-paths problem. The method of the invention is a method for reading a target memory cell located at an intersection of a target row of a gateless array and a target column of the gateless array, the method comprising: —reading a value of the target memory cell; and —calculating an actual value of the target memory cell based on the read value of the memory cell and a component of the read value caused by sneak path current. Utilizing either an “initial bits” strategy or a “dummy bits” strategy in order to calculate the component of the read value caused by sneak path current, example embodiments significantly reduce the number of memory accesses pixel for an array readout.