Patents by Inventor Khalid Radouane

Khalid Radouane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8962492
    Abstract: A method to thin an initial silicon-on-insulator substrate that has a layer of silicon oxide buried between a silicon carrier substrate and a silicon surface layer.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: February 24, 2015
    Assignee: Soitec
    Inventors: Patrick Reynaud, Ludovic Ecarnot, Khalid Radouane
  • Patent number: 8461055
    Abstract: The present invention relates to a method of treating wafers comprising at least one surface layer of silicon-germanium (SiGe) and a layer of strained silicon (sSi) in contact with the SiGe layer, the sSi layer being exposed by etching of the SiGe layer, the method comprising the steps of: (a) a first selective etch of the SiGe layer, optionally followed by an oxidative cleaning step; (b) a rinsing step using deionized water; (c) drying; and (d) a second selective etch step. The present invention relates to a wafer comprising at least one surface layer of strained silicon (sSi), the at least one surface layer of sSi having a thickness of at least 5 nm and at most 100 ?m and having at most 200 defects per wafer.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: June 11, 2013
    Assignee: Soitec
    Inventors: Khalid Radouane, Alessandro Baldaro
  • Patent number: 8324075
    Abstract: The invention relates to a method for recycling a substrate with a step-like residue in a first region of its surface, in particular along the edge of the substrate, which protrudes with respect to the surface of a remaining second region of the substrate, and wherein the first region comprises a modified zone, in particular an ion implanted zone, essentially in a plane corresponding to the plane of the surface of the remaining second region of the substrate and/or chamfered towards the edge of the substrate. To prevent the negative impact of contaminants in subsequent laminated wafer fabricating processes, the recycling method comprises a material removal step which is carried out such that the surface of the substrate in the first region is lying lower than the level of the modified zone before the material removal.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: December 4, 2012
    Assignee: Soitec
    Inventors: Cecile Aulnette, Khalid Radouane
  • Publication number: 20120009797
    Abstract: The invention concerns a method to thin an initial silicon-on-insulator substrate that has a layer of silicon oxide buried between a silicon carrier substrate and a silicon surface layer.
    Type: Application
    Filed: April 20, 2010
    Publication date: January 12, 2012
    Inventors: Patrick Reynaud, Ludovic Ecarnot, Khalid Radouane
  • Patent number: 8076219
    Abstract: A process for reducing or suppressing the appearance of watermarks in a hydrophobic surface of a semiconductor substrate prepared as a base substrate for epitaxial growth. The process includes cleaning the hydrophobic surface of the semiconductor substrate with an aqueous solution containing hydrofluoric acid (HF) and an additional acid having a pKa of less than 3, preferably hydrochloric acid (HCl), wherein the additional acid is present in the solution at a concentration by weight that is less than that of the HF; and final rinsing the cleaned hydrophobic surface of the semiconductor substrate with deionised water while subjecting the hydrophobic surface of the semiconductor substrate to megasonic waves for a time sufficient to reduce or suppress watermarks that could otherwise occur on the hydrophobic surface if the megasonic waves were not applied.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: December 13, 2011
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventor: Khalid Radouane
  • Publication number: 20100255659
    Abstract: A process for reducing or suppressing the appearance of watermarks in a hydrophobic surface of a semiconductor substrate prepared as a base substrate for epitaxial growth. The process includes cleaning the hydrophobic surface of the semiconductor substrate with an aqueous solution containing hydrofluoric acid (HF) and an additional acid having a pKa of less than 3, preferably hydrochloric acid (HCl), wherein the additional acid is present in the solution at a concentration by weight that is less than that of the HF; and final rinsing the cleaned hydrophobic surface of the semiconductor substrate with deionised water while subjecting the hydrophobic surface of the semiconductor substrate to megasonic waves for a time sufficient to reduce or suppress watermarks that could otherwise occur on the hydrophobic surface if the megasonic waves were not applied.
    Type: Application
    Filed: November 18, 2008
    Publication date: October 7, 2010
    Inventor: Khalid Radouane
  • Publication number: 20100181653
    Abstract: The invention relates to a method for recycling a substrate with a step-like residue in a first region of its surface, in particular along the edge of the substrate, which protrudes with respect to the surface of a remaining second region of the substrate, and wherein the first region comprises a modified zone, in particular an ion implanted zone, essentially in a plane corresponding to the plane of the surface of the remaining second region of the substrate and/or chamfered towards the edge of the substrate. To prevent the negative impact of contaminants in subsequent laminated wafer fabricating processes, the recycling method comprises a material removal step which is carried out such that the surface of the substrate in the first region is lying lower than the level of the modified zone before the material removal.
    Type: Application
    Filed: June 24, 2008
    Publication date: July 22, 2010
    Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES, S.A.
    Inventors: Cecile Aulnette, Khalid Radouane
  • Publication number: 20100140746
    Abstract: The present invention relates to a method of treating wafers comprising at least one surface layer of silicon-germanium (SiGe) and a layer of strained silicon (sSi) in contact with the SiGe layer, the sSi layer being exposed by etching of the SiGe layer, the method comprising the steps of: (a) a first selective etch of the SiGe layer, optionally followed by an oxidative cleaning step; (b) a rinsing step using deionized water; (c) drying; and (d) a second selective etch step. The present invention relates to a wafer comprising at least one surface layer of strained silicon (sSi), said surface layer of sSi having a thickness of at least 5 nanometres and at most 100 ?m of at most 200 defects per wafer.
    Type: Application
    Filed: May 3, 2007
    Publication date: June 10, 2010
    Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES, S.A.
    Inventors: Khalid Radouane, Alessandro Baldaro