Abstract: The embodiment herein generally relates to a system to apply moments to a user, particularly during gait. The system is a portable gyroscopic-assisted system, mounted on a user's body, particularly the upper body, particularly to influence orientation of users having difficulty with balancing during gait. The system comprises a plurality of variable-speed control moment gyroscopes (VSCMGs). The VSCMGs generate moments, particularly to counteract a fall to any direction. The VSCMGs are placed close to the center of mass of the user. The couple moments of the VSCMGs are transmitted to the user through a support structure that is tightly attached to the user. Particularly, the system controls moments based on detecting pre-fall conditions.

Abstract: The various embodiments herein provide a Uniform Circular Displaced Sensor Array (UC-DSA) system and method for measuring/estimating Direction of Arrival (DOA) of a wireless signal. The UC-DSA system comprises at least a set of two circular antenna arrays. The two circular antenna arrays have a number of elements. A Radio frequency (RF) receiver captures a wireless signal incident on a circular antenna array. A Direction of Arrival (DOA) estimator processes a received input signal and a Triangulation system provides the exact location of the source of the wireless signal. The two circular antenna arrays with the same number of elements are placed on different radii, and are shifted to have equal separation between inner elements and outer elements.

Abstract: The embodiments herein relates to a hybrid non-volatile memory cell system and architecture for designing integrated circuits. The system comprises CMOS access transistor connected to a memristor which stores a data based on a resistance. The system has a word line for accessing the hybrid memory and two bit lines carrying data of mutually opposite values for transferring a data from the memory. The two terminals of the transistor are connected respectively to a first terminal of the memristor and to a first bit line. The gate terminals of the transistors are coupled together to form a word line. The access transistors control the two bit lines during a read and write operation. A control logic performs a read and write operation with the hybrid memory cells. The memory architecture prevents a power leakage during data storage and controls a drift in a state during a read process.