Abstract: A method and apparatus for vertically mounting a semiconductor package is disclosed. The mounting apparatus has an extended (e.g. rectangular) shape, and is provided with a plurality of spaces adapted to receive and hold vertically semiconductor packages. To mount a semiconductor package in such a manner, the package is first inserted into a space in the apparatus provided therefor and fixedly held there. Next, a plurality of such semiconductor packages which are so held by the mounting apparatus are positioned on a printed circuit board, and their leads are soldered thereto to complete the mounting process. This facilitates both surface mounting and multi-layer wiring and decreases the potential for poor quality soldering. In addition, the mounting apparatus according to the present invention is beneficially heat dissipative, which helps to increase the life of a semiconductor package by heat which can cause deleterious thermal stresses.

Abstract: A chip-lifetime testing instrument for semiconductor devices which can detect defective chips by testing the performance and electrical lifetime of the chips in manufacturing process of the semiconductor devices, so that the manufacturing cost can be reduced and unnecessary processes for packaging of defective chips can be avoided, thereby reducing the necessary space for the set-up of the testing instrument.

Abstract: Included in a package for a photoactivated semiconductor device is a planar lead pattern. The lead pattern may comprise a repeated pattern of a lead frame. A pair of photoactivated semiconductor devices are mounted on respective portions of the lead frame. The semiconductor devices may be rectangular in configuration so as to have four generally-straight edges. A light-emitting device is mounted on a respective portion of the lead pattern. The geometrical interrelationship between the semiconductor devices and the light-emitting device achieves a high degree of optical coupling between the light-emitting device and the semiconductor devices. In particular, the semiconductor devices are positioned such that confronting, respective first edges of these devices are out of parallel with each other. The light-emitting device is then positioned to be orthogonally offset from both of the respective first edges of the semiconductor devices.