Patents by Inventor Khoa Bui

Khoa Bui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260010700
    Abstract: A method may include generating a first clock path, wherein a first clock control logic (CCL) is connected between a mesh and a first sequential gate. The method may include disconnecting the first CCL from the first sequential gate in the first clock path, and connecting the mesh to the first sequential gate, and generating a second clock path, wherein the mesh is connected to a second CCL. The method may include generating a first clock tree in the first clock path, the first clock tree being connected to the first sequential gate, and connecting the first CCL between the mesh and the first clock tree. Finally, the method may include generating a second clock tree in the second clock path between the second CCL and a second sequential gate.
    Type: Application
    Filed: November 4, 2024
    Publication date: January 8, 2026
    Inventors: Hongda Lu, Khoa Bui
  • Publication number: 20070152005
    Abstract: A combination motorcycle saddle pack, carry bag and foldable chair travel utility comprising a plurality of sections and each section having a means for holding a storage compartment, saddle pack convertible to a carry bag or a collapsible chair for use where utility is to be maximized and weight is a premium, where these three functions are useful in one article.
    Type: Application
    Filed: December 29, 2005
    Publication date: July 5, 2007
    Inventor: Khoa Bui
  • Patent number: 6094316
    Abstract: The present invention is a method and apparatus for removing transient DC level shifts caused by thermal asperities. A read signal is generated by a transducer in response to proximate contact between the transducer and magnetic flux fields recorded on a magnetic media surface. The read signal is provided to a continuous time filter and a sampler. During normal operation, the output of the sampler is provided directly to a fixed delay tree search detector. Upon encountering a thermal asperity, the output of the sampler is first provided to a 1-D sampled filter which removes the DC shift caused by the thermal asperity and then to the fixed delay tree search detector, which provides signal recovery. A multiplexer provides selection of the output signal from between sampler and the 1-D sample filter.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: July 25, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bac Pham, Khoa Bui, Kingston Lin
  • Patent number: 5862007
    Abstract: A method and apparatus is disclosed for removing transient DC level shifts caused by thermal asperities (TAs), thereby reducing TA induced errors. Read signal generated by a Magneto resistive (MR) is input to a continuous time filter and a sampler. Sampler output is input to a 1-D sampled filter which performs level equalization to remove DC Shift cased by TA disturbance. Sampled filter output is input to MUX along with sampler outputs. MUX selects sampled filter output during TAs. MUX output is input to a FIR filter and Viterbi decoder. Gain and Timing loop tracking and acquisition blocks receive sampler and FIR filter output and output correction signals for use by VGA and phase/frequency Detector.
    Type: Grant
    Filed: April 18, 1996
    Date of Patent: January 19, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bac Pham, Kingston Lin, Khoa Bui