Abstract: Exemplary semiconductor substrate supports may include a pedestal having a shaft and a platen. The semiconductor substrate supports may include a cover plate. The cover plate may be coupled with the platen along a first surface of the cover plate. The cover plate may define a recessed channel in a second surface of the cover plate opposite the first surface. The semiconductor substrate supports may include a puck coupled with the second surface of the cover plate. The puck may incorporate an electrode. The puck may define a plurality of apertures extending vertically through the puck to fluidly access the recessed channel defined in the cover plate.

Abstract: Exemplary semiconductor processing systems may include a processing chamber defining a processing region. The systems may include a foreline coupled with the processing chamber, the foreline defining a fluid conduit. The systems may include a radical generator having an inlet and an outlet. The outlet may be fluidly coupled with the foreline. The systems may include a gas source fluidly coupled with the inlet of the radical generator. The systems may include a throttle valve coupled with the foreline downstream of the radical generator.

Abstract: Exemplary semiconductor substrate supports may include a pedestal shaft. The semiconductor substrate supports may include a platen. The platen may define a fluid channel across a first surface of the platen. The semiconductor substrate supports may include a platen insulator positioned between the platen and the pedestal shaft. The semiconductor substrate supports may include a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate support. The semiconductor substrate supports may include a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft.

Abstract: Exemplary semiconductor substrate supports may include a pedestal shaft. The semiconductor substrate supports may include a platen. The platen may define a fluid channel across a first surface of the platen. The semiconductor substrate supports may include a platen insulator positioned between the platen and the pedestal shaft. The semiconductor substrate supports may include a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate support. The semiconductor substrate supports may include a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft.

Abstract: Exemplary substrate processing systems may include a factory interface and a load lock coupled with the factory interface. The systems may include a transfer chamber coupled with the load lock. The transfer chamber may include a robot configured to retrieve substrates from the load lock. The systems may include a chamber system positioned adjacent and coupled with the transfer chamber. The chamber system may include a transfer region laterally accessible to the robot. The transfer region may include a plurality of substrate supports disposed about the transfer region. Each substrate support of the plurality of substrate supports may be vertically translatable. The transfer region may also include a transfer apparatus rotatable about a central axis and configured to engage substrates and transfer substrates among the plurality of substrate supports. The chamber system may also include a plurality of processing regions vertically offset and axially aligned with an associated substrate support.

Abstract: Exemplary substrate processing systems may include a factory interface and a load lock coupled with the factory interface. The systems may include a transfer chamber coupled with the load lock. The transfer chamber may include a robot configured to retrieve substrates from the load lock. The systems may include a chamber system positioned adjacent and coupled with the transfer chamber. The chamber system may include a transfer region laterally accessible to the robot. The transfer region may include a plurality of substrate supports disposed about the transfer region. Each substrate support of the plurality of substrate supports may be vertically translatable. The transfer region may also include a transfer apparatus rotatable about a central axis and configured to engage substrates and transfer substrates among the plurality of substrate supports. The chamber system may also include a plurality of processing regions vertically offset and axially aligned with an associated substrate support.

Abstract: Exemplary semiconductor processing systems may include an inductively coupled plasma source. The systems may include an RF power source that is electrically coupled with the inductively coupled plasma source. The systems may include a first gas source fluidly coupled with the inductively coupled plasma source. The systems may include a second gas source. The systems may include a dual-channel showerhead assembly defining a first plurality of apertures and a second plurality of apertures. The first plurality of apertures may be fluidly coupled with the inductively coupled plasma source. The second plurality of apertures are fluidly coupled with the second gas source.

Abstract: Exemplary processing systems may include a chamber body. The systems may include a pedestal configured to support a semiconductor substrate. The systems may include a faceplate. The chamber body, the pedestal, and the faceplate may define a processing region. The faceplate may be coupled with an RF power source. The systems may include a remote plasma unit. The remote plasma unit may be coupled at electrical ground. The systems may include a discharge tube extending from the remote plasma unit towards the faceplate. The discharge tube may define a central aperture. The discharge tube may be electrically coupled with each of the faceplate and the remote plasma unit. The discharge tube may include ferrite extending about the central aperture of the discharge tube.

Abstract: semiconductor processing chambers include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures. The chambers may include a faceplate positioned between the blocker plate and the substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface and the substrate support may at least partially define a processing region within the chamber. The faceplate may define an inner plurality of apertures. Each of the inner apertures may include a generally cylindrical aperture profile. The faceplate may define an outer plurality of apertures that are positioned radially outward from the inner apertures. Each of the outer apertures may include a conical aperture profile that extends through the second surface.

Abstract: Exemplary semiconductor substrate supports may include a pedestal having a shaft and a platen. The semiconductor substrate supports may include a cover plate. The cover plate may be coupled with the platen along a first surface of the cover plate. The cover plate may define a recessed channel in a second surface of the cover plate opposite the first surface. The semiconductor substrate supports may include a puck coupled with the second surface of the cover plate. The puck may incorporate an electrode. The puck may define a plurality of apertures extending vertically through the puck to fluidly access the recessed channel defined in the cover plate.

Abstract: Exemplary semiconductor substrate supports may include a pedestal shaft. The semiconductor substrate supports may include a platen. The platen may define a fluid channel across a first surface of the platen. The semiconductor substrate supports may include a platen insulator positioned between the platen and the pedestal shaft. The semiconductor substrate supports may include a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate support. The semiconductor substrate supports may include a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft.

Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The semiconductor substrate may be housed in a processing region of a semiconductor processing chamber. The processing region may be defined between a faceplate and a substrate support on which the semiconductor substrate is seated. The methods may include forming a treatment plasma within the processing region of the semiconductor processing chamber. The treatment plasma may be formed at a first power level from a first power source. A second power may be applied to the substrate support from a second power source at a second power level. The methods may include densifying the flowable film within the feature defined within the semiconductor substrate with plasma effluents of the treatment plasma.

Abstract: Examples of the present technology include semiconductor processing methods that may include generating a plasma from a deposition precursor in a processing region of a semiconductor processing chamber. The plasma may be generated at a delivered power within a first period of time when plasma power is delivered from a power source operating at a first duty cycle. The methods may further include transitioning the power source from the first duty cycle to a second duty cycle after the first period of time. A layer may be deposited on a substrate in the processing region of the semiconductor processing chamber from the generated plasma. The layer, as deposited, may be characterized by a thickness of 50 ? or less. Exemplary deposition precursors may include one or more silicon-containing precursors, and an exemplary layer deposited on the substrate may include an amorphous silicon layer.

Abstract: Methods of controlling stress non-uniformity for semiconductor processing may include reflecting light off a surface of a wafer with an optical imaging device disposed within a cluster tool. The cluster tool may include a multi-chamber processing system. The methods may include collecting one or more color images of the surface of the wafer. The methods may include converting the one or more color images to sample stress intensity data comparing the sample stress intensity data to reference wafer stress intensity data. The methods may include identifying deviations of the sample stress intensity data relative to the reference wafer stress intensity data. The methods may include determining corrective actions for bringing the sample stress intensity data into conformity with the reference wafer stress intensity data. The methods may include implementing the corrective actions on the multi-chamber processing system.

Abstract: Exemplary substrate processing systems may include a factory interface and a load lock coupled with the factory interface. The systems may include a transfer chamber coupled with the load lock. The transfer chamber may include a robot configured to retrieve substrates from the load lock. The systems may include a chamber system positioned adjacent and coupled with the transfer chamber. The chamber system may include a transfer region laterally accessible to the robot. The transfer region may include a plurality of substrate supports disposed about the transfer region. Each substrate support of the plurality of substrate supports may be vertically translatable. The transfer region may also include a transfer apparatus rotatable about a central axis and configured to engage substrates and transfer substrates among the plurality of substrate supports. The chamber system may also include a plurality of processing regions vertically offset and axially aligned with an associated substrate support.