Patents by Inventor Khosrow Jian Motamedi
Khosrow Jian Motamedi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11765120Abstract: Non-volatile memory may contain definitions of: (i) a plurality of message queue implementations respectively associated with different queue behaviors, the different queue behaviors specified by corresponding sets of modes, and (ii) an application programming interface (API) through which applications can access one or more message queues. One or more processors may be configured to: create a message queue of a particular message queue type, supported by a corresponding message queue implementation, by specifying a set of modes corresponding to a queue behavior; receive, from a producing application and by way of the API, one or more messages for the message queue; store the one or more messages in a data structure associated with the message queue; receive, from a consuming application and by way of the API, a request to read from the message queue; and provide a message from the message queue to the consuming application.Type: GrantFiled: February 7, 2022Date of Patent: September 19, 2023Assignee: ServiceNow, Inc.Inventors: Khosrow Jian Motamedi, Nikhil Prashant Bendre, Harry Thomas Nelson, Sunil Kumar
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Publication number: 20230082829Abstract: A computing system includes a processor and memory. The memory includes instruction code that causes the processor to generate first and second parser instances and associate the first parser and the second parser with respective first and second search queries. The processor controls the first parser to repeatedly obtain data from the data stream in blocks until the first parser finishes identifying elements in the data stream associated with its search path. The processor controls the second parser to repeatedly obtain blocks from the first parser when the blocks obtained by the first parser have not been searched by the second parser, and controls the second parser to obtain blocks from the data stream when the blocks obtained by the first parser have been searched by the second parser and the first parser has finished searching.Type: ApplicationFiled: November 14, 2022Publication date: March 16, 2023Inventor: Khosrow Jian Motamedi
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Patent number: 11537620Abstract: A computing system includes a processor and memory. The memory includes instruction code that causes the processor to generate first and second parser instances and associate the first parser and the second parser with respective first and second search queries. The processor controls the first parser to repeatedly obtain data from the data stream in blocks until the first parser finishes identifying elements in the data stream associated with its search path. The processor controls the second parser to repeatedly obtain blocks from the first parser when the blocks obtained by the first parser have not been searched by the second parser, and controls the second parser to obtain blocks from the data stream when the blocks obtained by the first parser have been searched by the second parser and the first parser has finished searching.Type: GrantFiled: July 27, 2021Date of Patent: December 27, 2022Assignee: ServiceNow, Inc.Inventor: Khosrow Jian Motamedi
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Patent number: 11531683Abstract: A system includes a processor configured to create a rule repository instance. The rule repository instance specifies a plurality of different procedures that facilitate specifying a sequence of transformer rules by cascading each of the procedures together using a dot notation format. The processor configures the rule repository instance with a plurality of transformer rules using the dot notation format. The processor receives data from a file arranged according to a first structured data format. The processor executes the sequence of transformer rules to convert data elements in the file to a second structured data format. The processor then provides for display or storage the data as converted into the second structured data format by the sequence of transformer rules.Type: GrantFiled: November 6, 2019Date of Patent: December 20, 2022Assignee: ServiceNow, Inc.Inventors: Khosrow Jian Motamedi, Fernando Ros
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Publication number: 20220286423Abstract: Non-volatile memory may contain definitions of: (i) a plurality of message queue implementations respectively associated with different queue behaviors, the different queue behaviors specified by corresponding sets of modes, and (ii) an application programming interface (API) through which applications can access one or more message queues. One or more processors may be configured to: create a message queue of a particular message queue type, supported by a corresponding message queue implementation, by specifying a set of modes corresponding to a queue behavior; receive, from a producing application and by way of the API, one or more messages for the message queue; store the one or more messages in a data structure associated with the message queue; receive, from a consuming application and by way of the API, a request to read from the message queue; and provide a message from the message queue to the consuming application.Type: ApplicationFiled: February 7, 2022Publication date: September 8, 2022Inventors: Khosrow Jian Motamedi, Nikhil Prashant Bendre, Harry Thomas Nelson, Sunil Kumar
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Patent number: 11429631Abstract: A system includes a processor configured to obtain a sequence of transformer rules. The transformer rules specify a set of data elements arranged according to a first structured data format, and structural changes to be performed on the data elements that convert the data elements into a second structured data format. The processor receives a block of data from a file arranged according to the first structured data format. The processor executes the sequence of transformer rules to perform the structural changes to the block of data. When executing the particular transformer rule, the processor applies an adapter associated with the transformer rule to modify values in the block of data specified by the particular transformer. The processor then provides for display or storage the block of data as converted into the second structured data format by the sequence of transformer rules.Type: GrantFiled: November 6, 2019Date of Patent: August 30, 2022Assignee: ServiceNow, Inc.Inventors: Khosrow Jian Motamedi, Fernando Ros, Douglas Andrew Bell
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Patent number: 11277369Abstract: Non-volatile memory may contain definitions of: (i) a plurality of message queue implementations respectively associated with different queue behaviors, the different queue behaviors specified by corresponding sets of modes, and (ii) an application programming interface (API) through which applications can access one or more message queues. One or more processors may be configured to: create a message queue of a particular message queue type, supported by a corresponding message queue implementation, by specifying a set of modes corresponding to a queue behavior; receive, from a producing application and by way of the API, one or more messages for the message queue; store the one or more messages in a data structure associated with the message queue; receive, from a consuming application and by way of the API, a request to read from the message queue; and provide a message from the message queue to the consuming application.Type: GrantFiled: March 2, 2021Date of Patent: March 15, 2022Assignee: ServiceNow, Inc.Inventors: Khosrow Jian Motamedi, Nikhil Prashant Bendre, Harry Thomas Nelson, Sunil Kumar
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Publication number: 20210357414Abstract: A computing system includes a processor and memory. The memory includes instruction code that causes the processor to generate first and second parser instances and associate the first parser and the second parser with respective first and second search queries. The processor controls the first parser to repeatedly obtain data from the data stream in blocks until the first parser finishes identifying elements in the data stream associated with its search path. The processor controls the second parser to repeatedly obtain blocks from the first parser when the blocks obtained by the first parser have not been searched by the second parser, and controls the second parser to obtain blocks from the data stream when the blocks obtained by the first parser have been searched by the second parser and the first parser has finished searching.Type: ApplicationFiled: July 27, 2021Publication date: November 18, 2021Inventor: Khosrow Jian Motamedi
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Patent number: 11086879Abstract: A computing system includes a processor and memory. The memory includes instruction code that causes the processor to generate first and second parser instances and associate the first parser and the second parser with respective first and second search queries. The processor controls the first parser to repeatedly obtain data from the data stream in blocks until the first parser finishes identifying elements in the data stream associated with its search path. The processor controls the second parser to repeatedly obtain blocks from the first parser when the blocks obtained by the first parser have not been searched by the second parser, and controls the second parser to obtain blocks from the data stream when the blocks obtained by the first parser have been searched by the second parser and the first parser has finished searching.Type: GrantFiled: October 2, 2019Date of Patent: August 10, 2021Assignee: ServiceNow, Inc.Inventor: Khosrow Jian Motamedi
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Publication number: 20210133205Abstract: A system includes a processor configured to create a rule repository instance. The rule repository instance specifies a plurality of different procedures that facilitate specifying a sequence of transformer rules by cascading each of the procedures together using a dot notation format. The processor configures the rule repository instance with a plurality of transformer rules using the dot notation format. The processor receives data from a file arranged according to a first structured data format. The processor executes the sequence of transformer rules to convert data elements in the file to a second structured data format. The processor then provides for display or storage the data as converted into the second structured data format by the sequence of transformer rules.Type: ApplicationFiled: November 6, 2019Publication date: May 6, 2021Inventors: Khosrow Jian Motamedi, Fernando Ros
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Publication number: 20210133204Abstract: A system includes a processor configured to obtain a sequence of transformer rules. The transformer rules specify a set of data elements arranged according to a first structured data format, and structural changes to be performed on the data elements that convert the data elements into a second structured data format. The processor receives a block of data from a file arranged according to the first structured data format. The processor executes the sequence of transformer rules to perform the structural changes to the block of data. When executing the particular transformer rule, the processor applies an adapter associated with the transformer rule to modify values in the block of data specified by the particular transformer. The processor then provides for display or storage the block of data as converted into the second structured data format by the sequence of transformer rules.Type: ApplicationFiled: November 6, 2019Publication date: May 6, 2021Inventors: Khosrow Jian Motamedi, Fernando Ros, Douglas Andrew Bell
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Publication number: 20210124690Abstract: A system may include one or more processors, a non-volatile memory unit storing a sequence of files, and a volatile memory unit storing a partial lexicon. Content within the sequence of files may represent structured data, and elements within the structured data may be uniquely identified by paths. Entries within the partial lexicon may map the paths to the sequence of files and offsets therein identifying the elements that correspond to the paths. Instruction code executable by the processors may cause the system to perform operations including: (i) receiving a specification of a path; (ii) determining that the partial lexicon does not contain a mapping for the path; (iii) obtaining, into the volatile memory unit, supplemental data for the partial lexicon that identifies an element that corresponds to the path; and (iv) providing, for display, storage, or further processing, at least part of the element.Type: ApplicationFiled: October 25, 2019Publication date: April 29, 2021Inventors: Fernando Ros, Khosrow Jian Motamedi
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Publication number: 20210103591Abstract: A computing system includes a processor and memory. The memory includes instruction code that causes the processor to generate first and second parser instances and associate the first parser and the second parser with respective first and second search queries. The processor controls the first parser to repeatedly obtain data from the data stream in blocks until the first parser finishes identifying elements in the data stream associated with its search path. The processor controls the second parser to repeatedly obtain blocks from the first parser when the blocks obtained by the first parser have not been searched by the second parser, and controls the second parser to obtain blocks from the data stream when the blocks obtained by the first parser have been searched by the second parser and the first parser has finished searching.Type: ApplicationFiled: October 2, 2019Publication date: April 8, 2021Inventor: Khosrow Jian Motamedi
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Publication number: 20200089750Abstract: An embodiment may involve a computing system that includes a processor and memory. The memory may contain program instructions executable by the processor to repeatedly perform, for each block of a textual data-interchange file, operations including: obtaining a block of the file, where the block contains one or more records each containing one or more elements; identifying any pre-defined elements contained in records that are completed within the block, where the pre-defined elements are specified by a set of paths, the paths each hierarchically defining a location of an element within a record; storing, and into one or more files or one or more database tables, the pre-defined elements contained in records that are completed within the block; and determining whether the block ends with a partial record, and maintaining any such partial record for later storage in conjunction with processing of a subsequent block of the file.Type: ApplicationFiled: September 17, 2018Publication date: March 19, 2020Inventors: Fernando Ros, Khosrow Jian Motamedi, Gregory Allen Krasnow, Douglas Andrew Bell