Patents by Inventor Ki Im

Ki Im has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070161144
    Abstract: Provided is a method for manufacturing a CMOS image sensor. In the method, a mask layer is formed on a semiconductor substrate to define a device isolation region. The semiconductor substrate is selectively removed by wet etching using the mask layer as a mask to form a trench to a predetermined depth. A device isolation layer is formed in the trench, and the mask layer is removed. A gate electrode is formed on a gate insulation layer in an active region of the semiconductor substrate defined by the device isolation layer. A photodiode (PD) region is formed in the semiconductor substrate at one side of the gate electrode. A floating diffusion region is formed in the semiconductor substrate at the other side of the gate electrode.
    Type: Application
    Filed: December 26, 2006
    Publication date: July 12, 2007
    Inventor: Ki Im
  • Publication number: 20070059895
    Abstract: A dielectric layer, an MIM capacitor, a method of manufacturing the dielectric layer and a method of manufacturing the MIM capacitor. The method of manufacturing the dielectric layer includes chemically reacting a metal source with different amounts of an oxidizing agent based on the cycle of the chemical reactions in order to control leakage characteristics of the dielectric layer, the electrical characteristics of the dielectric layer, and the dielectric characteristics of the dielectric layer.
    Type: Application
    Filed: February 28, 2006
    Publication date: March 15, 2007
    Inventors: Ki Im, Jae Yeo, Kyoung Yoon, Jong Lee, Eun Chung, Young Kim
  • Publication number: 20060125041
    Abstract: A transistor using impact ionization and a method of manufacturing the same are provided. A gate dielectric layer, a gate, and first and second spacers are formed on a semiconductor substrate. A first impurity layer is formed spaced from the first spacer and a second impurity layer is formed expanding and overlapping with the second spacer therebelow, by performing slant ion-implantation on the semiconductor substrate using the gate and the first and second spacers as a mask. A source and a drain are formed on the semiconductor substrate to be self-aligned with the first and second spacers, respectively, thereby defining an ionization region between the source and the drain in the semiconductor substrate. The source includes a first silicide layer to form a schottky junction with the ionization region.
    Type: Application
    Filed: December 6, 2005
    Publication date: June 15, 2006
    Inventors: Jong Yang, In Baek, Ki Im, Chang Ahn, Won Cho, Seong Lee
  • Publication number: 20060121661
    Abstract: A non-volatile memory device using mobile ionic charges and a method of manufacturing the same are provided. The method includes forming a gate dielectric layer on a semiconductor substrate, injecting mobile ionic charges into the gate dielectric layer by leading source plasma to a surface of the gate dielectric layer and implanting ions within the source plasma into the gate dielectric layer using plasma doping, forming on the gate dielectric layer a gate to which a control voltage controlling distribution of the mobile ionic charges within the gate dielectric layer is supplied to control a threshold voltage, and forming a source region and a drain region in the semiconductor substrate near the gate.
    Type: Application
    Filed: December 6, 2005
    Publication date: June 8, 2006
    Inventors: Jong Yang, In Baek, Ki Im, Chang Ahn, Won Cho, Seong Lee