Patents by Inventor Ki Jong Sung

Ki Jong Sung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154127
    Abstract: A positive electrode including a positive electrode active material layer disposed on at least one surface of a positive electrode current collector, the positive electrode active material layer including a lithium transition metal phosphate, a fluorine-based binder, and a conductive material. The lithium transition metal phosphate includes a carbon coating layer formed on a surface thereof, and a ratio (B/A) of a total weight (B) of the fluorine-based binder to a total weight (A) of carbon of the conductive material and the lithium transition metal phosphate in the positive electrode active material layer is 0.7 to 1.7.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 9, 2024
    Applicant: LG Energy Solution, Ltd.
    Inventors: Geum Jae Han, O Jong Kwon, Kwang Jin Kim, Ki Woong Kim, In Gu An, Jung Hun Choi, Da Young Lee, Jin Su Sung, Jeong Hwa Park
  • Patent number: 10332587
    Abstract: A dynamic random access memory (DRAM) device includes a memory cell array including a first sub memory cell array block including a plurality of first memory cells between a plurality of first sub word lines, and a plurality of first odd-numbered bit lines and a plurality of dummy bit lines and includes a second sub memory cell array block including a plurality of second memory cells between a plurality of second sub word lines, a plurality of second odd-numbered bit lines, and a plurality of second even-numbered bit lines. The memory cell array may be arranged to have an open bit line architecture in which the plurality of first odd-numbered bit lines and the plurality of second even-numbered bit lines form bit line pairs.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: June 25, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki Jong Sung, Dae Sun Kim, Jin Seon Kim, In Cheol Nam
  • Publication number: 20190180812
    Abstract: A dynamic random access memory (DRAM) device includes a memory cell array including a first sub memory cell array block including a plurality of first memory cells between a plurality of first sub word lines, and a plurality of first odd-numbered bit lines and a plurality of dummy bit lines and includes a second sub memory cell array block including a plurality of second memory cells between a plurality of second sub word lines, a plurality of second odd-numbered bit lines, and a plurality of second even-numbered bit lines. The memory cell array may be arranged to have an open bit line architecture in which the plurality of first odd-numbered bit lines and the plurality of second even-numbered bit lines form bit line pairs.
    Type: Application
    Filed: May 22, 2018
    Publication date: June 13, 2019
    Inventors: Ki Jong Sung, Dae Sun Kim, Jin Seon Kim, In Cheol Nam