Patents by Inventor Ki Joo SIM

Ki Joo SIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220217842
    Abstract: A printed circuit board includes a first insulating layer, a metal layer disposed on one surface of the first insulating layer, a first circuit layer disposed inside the first insulating layer and having one surface exposed to the one surface of the first insulating layer so as to be in contact with one surface of the metal layer, a second circuit layer in contact with the other surface of the metal layer, and a second insulating layer disposed on the one surface of the first insulating layer to cover the metal layer and the second circuit layer. The first and second circuit layers respectively include a metal different from the metal layer.
    Type: Application
    Filed: October 14, 2021
    Publication date: July 7, 2022
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chan Jin Park, Young Ook Cho, Hyun Seok Yang, Ki Joo Sim, Won Seok Lee, Mi Jeong Jeon
  • Patent number: 10163746
    Abstract: A semiconductor package and manufacturing method thereof includes a chip member installed on an upper surface, a lower surface, or both of a substrate. The semiconductor package and manufacturing method thereof also include a mold part stacked embedding the chip member, a connection member disposed at a center portion of the mold part, and a solder part formed on a portion of the connection member.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: December 25, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong In Ryu, Ki Joo Sim, Do Jae Yoo, Ki Ju Lee, Jin Su Kim
  • Patent number: 10109595
    Abstract: A double-sided package module includes a substrate, a first sealing member, a second sealing member, and an extension portion. The substrate includes electronic components positioned on a first surface and a second surface of the substrate. The first sealing member and the second sealing member are positioned on the first surface and the second surface, respectively. The extension portion protrudes from a lateral surface of the substrate into a space between the first sealing member and the second sealing member.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: October 23, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Hee Jung Jung, Jong In Ryu, Ki Joo Sim
  • Publication number: 20170221835
    Abstract: A double-sided package module includes a substrate, a first sealing member, a second sealing member, and an extension portion. The substrate includes electronic components positioned on a first surface and a second surface of the substrate. The first sealing member and the second sealing member are positioned on the first surface and the second surface, respectively. The extension portion protrudes from a lateral surface of the substrate into a space between the first sealing member and the second sealing member.
    Type: Application
    Filed: September 16, 2016
    Publication date: August 3, 2017
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae YOO, Hee Jung JUNG, Jong In RYU, Ki Joo SIM
  • Publication number: 20160315027
    Abstract: A semiconductor package and manufacturing method thereof includes a chip member installed on an upper surface, a lower surface, or both of a substrate. The semiconductor package and manufacturing method thereof also include a mold part stacked embedding the chip member, a connection member disposed at a center portion of the mold part, and a solder part formed on a portion of the connection member.
    Type: Application
    Filed: January 21, 2016
    Publication date: October 27, 2016
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong In RYU, Ki Joo SIM, Do Jae YOO, Ki Ju LEE, Jin Su KIM