Patents by Inventor Ki-Sul Cho

Ki-Sul Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8329523
    Abstract: A method of fabricating an array substrate for a display device includes: forming a buffer layer on a substrate having a pixel region; sequentially forming a gate electrode of impurity-doped polycrystalline silicon, a gate insulating layer and an active layer of intrinsic polycrystalline silicon on the buffer layer in the pixel region; forming an interlayer insulating layer of an inorganic insulating material on the active layer; sequentially forming a source barrier pattern, a source ohmic contact layer and a source electrode on the interlayer insulating layer, sequentially forming a drain barrier pattern, a drain ohmic contact layer and a drain electrode on the interlayer insulating layer, and sequentially forming a first dummy pattern, a second dummy pattern and a data line on the interlayer insulating layer; forming a first passivation layer on a surface of the interlayer insulating layer including the source electrode, the drain electrode and the data line formed thereon; forming a gate line on the first
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: December 11, 2012
    Assignee: LG Display Co., Ltd.
    Inventors: Hee-Dong Choi, Ki-Sul Cho, Hye-Young Choi, Doo-Seok Yang, Byeong-Gyu Roh
  • Patent number: 8178883
    Abstract: A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate line, a gate pad, a gate electrode, and a data pad on a substrate through a first mask process, forming a gate insulating layer on a substantial part of an entire surface of the substrate including the gate line, the gate pad, the gate electrode, and the data pad, forming a data line, a source-drain pattern and an active layer on the gate insulating layer and forming a gate pad contact hole and a data pad contact hole in the gate insulating layer through a second mask process, and forming a pixel electrode, a gate pad terminal, a data pad terminal, a source electrode, a drain electrode, and an ohmic contact layer through a third mask process.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: May 15, 2012
    Assignee: LG Display Co., Ltd.
    Inventors: Ki-Sul Cho, Young-Seok Choi, Byung-Yong Ahn, Tae-Ung Hwang, Dong-Jun Min, Bo-Kyoung Jung
  • Publication number: 20120104405
    Abstract: A method of fabricating an array substrate for an organic electroluminescent device includes forming a semiconductor layer of polysilicon in an element region, and a semiconductor pattern of polysilicon in a storage region on a substrate; forming a multiple-layered gate electrode corresponding to a center portion of the semiconductor layer and a first storage electrode corresponding to the semiconductor pattern; performing an impurity-doping to make a portion of the semiconductor layer not covered by the gate electrode into an ohmic contact layer and make the semiconductor pattern into a second storage electrode; forming source and drain electrodes and a third storage electrode corresponding to the first storage electrode; forming a first electrode contacting the drain electrode and a fourth storage electrode corresponding to the third storage electrode.
    Type: Application
    Filed: October 31, 2011
    Publication date: May 3, 2012
    Inventors: Hee-Dong CHOI, Ki-Sul Cho, Seong-Moh Seo
  • Publication number: 20100323482
    Abstract: A TFT array substrate is provided. The TFT array substrate includes: a gate electrode connected to a gate line; a source electrode connected to a data line that crosses the gate line and defines a pixel region; a drain electrode facing the source electrode with a channel between; a semiconductor layer forming the channel in between the source electrode and the drain electrode; a pixel electrode in the pixel region and contacting the drain electrode; a channel passivation layer formed on the semiconductor layer; a gate pad with a gate pad lower electrode that extends from the gate line; and a data pad having a data pad lower electrode separated from the data line.
    Type: Application
    Filed: August 27, 2010
    Publication date: December 23, 2010
    Inventors: Young Seok CHOI, Hong Woo Yu, Ki Sul Cho, Jae Ow Lee, Bo Kyoung Jung
  • Publication number: 20100315584
    Abstract: Provided is an array substrate for an IPS-mode LCD device and method of fabricating the same that prevents a problem referred to as wavy noise. The IPS-mode LCD device and method have a shorter processing time and low error rate without an increase in fabrication and production costs.
    Type: Application
    Filed: August 4, 2010
    Publication date: December 16, 2010
    Inventors: Ki-Sul Cho, Young-Seok Choi, Byung-Yong Ahn, Tae-Ung Hwang, Dong-Jun Min, Bo-Kyoung Jung
  • Publication number: 20100289023
    Abstract: A method of fabricating an array substrate for a display device includes: forming a buffer layer on a substrate having a pixel region; sequentially forming a gate electrode of impurity-doped polycrystalline silicon, a gate insulating layer and an active layer of intrinsic polycrystalline silicon on the buffer layer in the pixel region; forming an interlayer insulating layer of an inorganic insulating material on the active layer; sequentially forming a source barrier pattern, a source ohmic contact layer and a source electrode on the interlayer insulating layer, sequentially forming a drain barrier pattern, a drain ohmic contact layer and a drain electrode on the interlayer insulating layer, and sequentially forming a first dummy pattern, a second dummy pattern and a data line on the interlayer insulating layer; forming a first passivation layer on a surface of the interlayer insulating layer including the source electrode, the drain electrode and the data line formed thereon; forming a gate line on the first
    Type: Application
    Filed: December 23, 2009
    Publication date: November 18, 2010
    Inventors: Hee-Dong Choi, Ki-Sul Cho, Hye-Young Choi, Doo-Seok Yang, Byeong-Gyu Roh
  • Patent number: 7804089
    Abstract: A TFT array substrate is provided. The TFT array substrate includes: a gate electrode connected to a gate line; a source electrode connected to a data line that crosses the gate line and defines a pixel region; a drain electrode facing the source electrode with a channel between; a semiconductor layer forming the channel in between the source electrode and the drain electrode; a pixel electrode in the pixel region and contacting the drain electrode; a channel passivation layer formed on the semiconductor layer; a gate pad with a gate pad lower electrode that extends from the gate line; and a data pad having a data pad lower electrode separated from the data line.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: September 28, 2010
    Assignee: LG Display Co., Ltd.
    Inventors: Young Seok Choi, Hong Woo Yu, Ki Sul Cho, Jae Ow Lee, Bo Kyoung Jung
  • Patent number: 7796225
    Abstract: Provided is an array substrate for an IPS-mode LCD device and method of fabricating the same that prevents a problem referred to as wavy noise. The IPS-mode LCD device and method have a shorter processing time and low error rate without an increase in fabrication and production costs.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: September 14, 2010
    Assignee: LG Display Co., Ltd.
    Inventors: Ki-Sul Cho, Young-Seok Choi, Byung-Yong Ahn, Tae-Ung Hwang, Dong-Jun Min, Bo-Kyoung Jung
  • Publication number: 20100075472
    Abstract: A TFT array substrate includes: a gate electrode connected to a gate line; a source electrode connected to a data line crossing the gate line to define a pixel region; a drain electrode which is opposite to the source electrode with a channel in between; a semiconductor layer defining the channel between the source electrode and the drain electrode; a pixel electrode in the pixel region and connected to the drain electrode; a channel passivation layer on the channel of the semiconductor layer; a gate pad extending from the gate line, where a semiconductor pattern and a transparent conductive pattern are formed; a data pad connected to the data line, where the transparent conductive pattern is formed; and a gate insulating layer formed under the semiconductor layer, the gate line and the gate pad, and the data line and the data pad.
    Type: Application
    Filed: November 25, 2009
    Publication date: March 25, 2010
    Inventors: Young Seok Choi, Hong Woo Yu, Ki Sul Cho, Jae Ow Lee, Bo Kyoung Jung
  • Patent number: 7649581
    Abstract: Disclosed is an array substrate of an LCD, and a method for fabricating it, which simplifies the fabrication process, thereby reducing fabrication costs. The process is simplified because the array substrate does not have a passivation film. The thin film transistors on the array substrate each have an active layer that is protected from contamination by forming a channel insulation layer on the active layer through a dry-etching process. Further, the gate line, gate pad, and gate electrode may have a two-layer structure having a low-resistance metal layer and a barrier metal layer, or a three-layer structure having a low-resistance metal layer and two barrier metal layers.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: January 19, 2010
    Assignee: LG Display Co., Ltd.
    Inventors: Young Seok Choi, Byung Yong Ahn, Hong Woo Yu, Ki Sul Cho
  • Patent number: 7646018
    Abstract: A TFT array substrate includes: a gate electrode connected to a gate line; a source electrode connected to a data line crossing the gate line to define a pixel region; a drain electrode which is opposite to the source electrode with a channel in between; a semiconductor layer defining the channel between the source electrode and the drain electrode; a pixel electrode in the pixel region and connected to the drain electrode; a channel passivation layer on the channel of the semiconductor layer; a gate pad extending from the gate line, where a semiconductor pattern and a transparent conductive pattern are formed; a data pad connected to the data line, where the transparent conductive pattern is formed; and a gate insulating layer formed under the semiconductor layer, the gate line and the gate pad, and the data line and the data pad.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: January 12, 2010
    Assignee: LG Display Co., Ltd.
    Inventors: Young Seok Choi, Hong Woo Yu, Ki Sul Cho, Jae Ow Lee, Bo Kyoung Jung
  • Publication number: 20100001278
    Abstract: A thin film transistor array substrate and a fabricating method thereof are disclosed. The thin film transistor array substrate protects a thin film transistor without a protective film and accordingly reduces the manufacturing cost. In the thin film transistor array substrate, a gate electrode is connected to a gate line. A source electrode is connected to a data line crossing the gate line to define a pixel area. A drain electrode is opposed to the source electrode with a channel therebetween. A semiconductor layer is in the channel. A pixel electrode in the pixel area contacts the drain electrode over substantially the entire overlapping area between the two. A channel protective film is provided on the semiconductor layer corresponding to the channel to protect the semiconductor layer.
    Type: Application
    Filed: August 14, 2009
    Publication date: January 7, 2010
    Applicant: LG Display Co., Ltd.
    Inventors: Young Seok Choi, Byung Yong Ahn, Ki Sul Cho, Hong Woo Yu
  • Patent number: 7589030
    Abstract: A method of fabricating a liquid crystal display device includes performing a first mask process to form a gate line, a gate pad, and a gate electrode on a substrate. The method of fabricating a liquid crystal display device further includes performing a second mask process to form an active layer on the gate electrode, performing a third mask process to form a pixel electrode contacting the active layer, and performing a fourth mask process to form a source electrode and a drain electrode on the active layer.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: September 15, 2009
    Assignee: LG. Display Co., Ltd.
    Inventors: Ki Sul Cho, Young Seok Choi, Byung Yong Ahn, Tae Ung Hwang, Dong Jun Min, Bo Kyoung Jung
  • Patent number: 7586123
    Abstract: A thin film transistor array substrate and a fabricating method thereof are disclosed. The thin film transistor array substrate protects a thin film transistor without a protective film and accordingly reduces the manufacturing cost. In the thin film transistor array substrate, a gate electrode is connected to a gate line. A source electrode is connected to a data line crossing the gate line to define a pixel area. A drain electrode is opposed to the source electrode with a channel therebetween. A semiconductor layer is in the channel. A pixel electrode in the pixel area contacts the drain electrode over substantially the entire overlapping area between the two. A channel protective film is provided on-the semiconductor layer corresponding to the channel to protect the semiconductor layer.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: September 8, 2009
    Assignee: LG. Display Co., Ltd.
    Inventors: Young Seok Choi, Byung Yong Ahn, Ki Sul Cho, Hong Woo Yu
  • Publication number: 20090159895
    Abstract: A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate line, a gate pad, a gate electrode, and a data pad on a substrate through a first mask process, forming a gate insulating layer on a substantial part of an entire surface of the substrate including the gate line, the gate pad, the gate electrode, and the data pad, forming a data line, a source-drain pattern and an active layer on the gate insulating layer and forming a gate pad contact hole and a data pad contact hole in the gate insulating layer through a second mask process, and forming a pixel electrode, a gate pad terminal, a data pad terminal, a source electrode, a drain electrode, and an ohmic contact layer through a third mask process.
    Type: Application
    Filed: December 8, 2008
    Publication date: June 25, 2009
    Inventors: Ki-Sul Cho, Young-Seok Choi, Byung-Yong Ahn, Tae-Ung Hwang, Dong-Jun Min, Bo-Kyoung Jung
  • Patent number: 7479419
    Abstract: A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate line, a gate pad, a gate electrode, and a data pad on a substrate through a first mask process, forming a gate insulating layer on a substantial part of an entire surface of the substrate including the gate line, the gate pad, the gate electrode, and the data pad, forming a data line, a source-drain pattern and an active layer on the gate insulating layer and forming a gate pad contact hole and a data pad contact hole in the gate insulating layer through a second mask process, and forming a pixel electrode, a gate pad terminal, a data pad terminal, a source electrode, a drain electrode, and an ohmic contact layer through a third mask process.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: January 20, 2009
    Assignee: LG Display Co., Ltd.
    Inventors: Ki-Sul Cho, Young-Seok Choi, Byung-Yong Ahn, Tae-Ung Hwang, Dong-Jun Min, Bo-Kyoung Jung
  • Patent number: 7253850
    Abstract: A liquid crystal display device adopting a storage-on-common method is disclosed to prevent the operation of a unit pixel with a point deficiency, such as a brilliant spot, at its occurrence, thereby preventing degradation of a picture quality caused due to the defective pixel. Because the defective pixel is controlled to turn black by the use of a repair pattern, the picture quality degradation due to the defective pixel is prevented when the liquid crystal display device is driven.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: August 7, 2007
    Assignee: LG.Philips LCD Co., Ltd.
    Inventor: Ki-Sul Cho
  • Publication number: 20070153198
    Abstract: Provided is an array substrate for an IPS-mode LCD device and method of fabricating the same that prevents a problem referred to as wavy noise. The IPS-mode LCD device and method have a shorter processing time and low error rate without an increase in fabrication and production costs.
    Type: Application
    Filed: December 15, 2006
    Publication date: July 5, 2007
    Inventors: Ki-sul Cho, Young-Seok Choi, Byung-Yong Ahn, Tae-Ung Hwang, Dong-Jun Min, Bo-Kyoung Jung
  • Publication number: 20060262244
    Abstract: A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate line, a gate pad, a gate electrode, and a data pad on a substrate through a first mask process, forming a gate insulating layer on a substantial part of an entire surface of the substrate including the gate line, the gate pad, the gate electrode, and the data pad, forming a data line, a source-drain pattern and an active layer on the gate insulating layer and forming a gate pad contact hole and a data pad contact hole in the gate insulating layer through a second mask process, and forming a pixel electrode, a gate pad terminal, a data pad terminal, a source electrode, a drain electrode, and an ohmic contact layer through a third mask process.
    Type: Application
    Filed: December 16, 2005
    Publication date: November 23, 2006
    Inventors: Ki-Sul Cho, Young-Seok Choi, Byung-Yong Ahn, Tae-Ung Hwang, Dong-Jun Min, Bo-Kyoung Jung
  • Publication number: 20040125259
    Abstract: A liquid crystal display device adopting a storage-on-common method is disclosed to prevent the operation of a unit pixel with a point deficiency, such as a brilliant spot, at its occurrence, thereby preventing degradation of a picture quality caused due to the defective pixel. Because the defective pixel is controlled to turn black by the use of a repair pattern, the picture quality degradation due to the defective pixel is prevented when the liquid crystal display device is driven.
    Type: Application
    Filed: December 10, 2003
    Publication date: July 1, 2004
    Inventor: Ki-Sul Cho