Abstract: An integrated circuit module package includes a lead frame having a recessed area. A semiconductor die containing active electrical components is attached to the recessed area of the lead frame. An integrated passive device containing passive electrical components is vertically stacked with, and electrically coupled to, the semiconductor die. An optional heat sink is attached to the integrated passive device. The integrated passive device is connected to the lead frame by conductors to electrically couple the integrated passive device and the semiconductor die to circuitry external to the integrated circuit module package. A cap is then attached to the heat sink or the integrated passive device to protect the semiconductor die and the integrated passive device. The integrated circuit module package dissipates heat from the semiconductor die through the lead frame, and dissipates heat from the integrated passive device through the cap and optional heat sink.

Abstract: A low profile radio frequency (RF) module and package with efficient heat dissipation characteristics, and a method of assembly thereof, are provided. In some embodiments, the RF module package comprises a radio frequency integrated circuit (RFIC) attached to a recessed area of a lead frame. The RFIC has an active integrated circuit pattern and a plurality of conductors formed on input/output pads of the active integrated circuit pattern. An integrated passive device (IPD) is attached to the RFIC via the plurality of conductors. The IPD has a passive integrated circuit pattern, a plurality of electrode pads connected to nodes of the passive integrated circuit pattern, and metal-filled vias for electrically connecting the electrode pads to the plurality of conductors. The RFIC includes a plurality of heat conducting vias for conducting heat to the lead frame.

Abstract: A low profile radio frequency (RF) module and package with efficient heat dissipation characteristics, and a method of assembly thereof, are provided. In some embodiments, the RF module package comprises a radio frequency integrated circuit (RFIC) attached to a recessed area of a lead frame. The RFIC has an active integrated circuit pattern and a plurality of conductors formed on input/output pads of the active integrated circuit pattern. An integrated passive device (IPD) is attached to the RFIC via the plurality of conductors. The IPD has a passive integrated circuit pattern, a plurality of electrode pads connected to nodes of the passive integrated circuit pattern, and metal-filled vias for electrically connecting the electrode pads to the plurality of conductors. The RFIC includes a plurality of heat conducting vias for conducting heat to the lead frame.

Abstract: Method for fabricating a compound semiconductor device including the steps of forming an active layer on a substrate, forming a plurality of ohmic electrodes on predetermined regions of the active layer, forming a mask material layer on the entire surface of the active layer inclusive of the ohmic electrodes, removing the mask material layer from predetermined regions thereof to open regions of the active layer between the ohmic electrodes and at least any one of the ohmic electrodes, etching the opened regions of the active layer each to a predetermined depth, and removing the mask material layer and forming a gate electrode on each of the opened regions of the active layer each having been etched to the predetermined depth, whereby the possibility of forming devices having threshold voltages different from one another on the same substrate allows application of the device of the present invention to variety of MMIC.

Abstract: Method for fabricating a semiconductor device is disclosed, including the steps of: forming a first resist layer on a substrate; patterning a predetermined region of the first resist layer to form a pattern having a first width which exposes the substrate; forming an insulating film on an entire surface of the substrate including the first resist layer; forming a second resist layer on the insulating film; patterning a predetermined region of the second resist layer to form a pattern over the pattern of the first resist layer having a second width which exposes the insulating film; using the second resist layer as a mask in etching the exposed insulating film to form sidewall spacers at sides of the pattern of the first resist layer; forming a metal layer on an entire resultant surface including the second photoresist layer; and, removing the first and second resist layers and the insulating film to form a T form gate electrode.