Patents by Inventor Ki Yoon

Ki Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220131708
    Abstract: In one example an apparatus comprises verification circuitry to receive, in a RSA/ECDSA processor, an input message, compute, in the RSA/ECDSA processor, a hash digest (d) for the message, and provide the hash digest as an input to a XMSS/LMS processor. Other examples may be described.
    Type: Application
    Filed: December 9, 2021
    Publication date: April 28, 2022
    Applicant: Intel Corporation
    Inventors: Santosh Ghosh, Manoj Sastry, Ki Yoon
  • Publication number: 20220100873
    Abstract: In one example an apparatus comprises signature circuitry to receive input variables comprising a value (X), a start index (i), a number of steps (s), a seed (SEED) and a memory address (ADRS) to store one or more context variables, and implement a loop for a multi-stage calculation of a Winternitz one-time signature (WOTS), wherein one or more WOTS hash functions are computed in each stage of the multi-stage calculation. Other examples may be described.
    Type: Application
    Filed: December 9, 2021
    Publication date: March 31, 2022
    Applicant: Intel Corporation
    Inventors: Ki Yoon, Georgina Saborio Dobles, Santosh Ghosh, Manoj Sastry
  • Patent number: 11105854
    Abstract: In one embodiment, an apparatus includes multiple die and at least one interconnect to couple the die. A first die includes one or more cores, a first fabric and a first fabric transactor coupled to the first fabric, the first fabric transactor to initiate a functional test of the apparatus in response to a test signal, cause at least one first test transaction to be sent to a second die, receive a first response to the at least one first test transaction from the second die, and identify, based at least in part on the first response to the at least one test transaction, a location of a failure and report the location of the failure to a destination. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: August 31, 2021
    Assignee: Intel Corporation
    Inventors: Lakshminarayana Pappu, Robert P. Adler, Ki Yoon
  • Publication number: 20190033368
    Abstract: In one embodiment, an apparatus includes multiple die and at least one interconnect to couple the die. A first die includes one or more cores, a first fabric and a first fabric transactor coupled to the first fabric, the first fabric transactor to initiate a functional test of the apparatus in response to a test signal, cause at least one first test transaction to be sent to a second die, receive a first response to the at least one first test transaction from the second die, and identify, based at least in part on the first response to the at least one test transaction, a location of a failure and report the location of the failure to a destination. Other embodiments are described and claimed.
    Type: Application
    Filed: November 2, 2017
    Publication date: January 31, 2019
    Inventors: Lakshminarayana Pappu, Robert P. Adler, Ki Yoon
  • Patent number: 9223668
    Abstract: A fabric trace hook is disclosed to enable debugging operations of agents operating in a peer-to-peer integrated on-chip system fabric. The fabric trace hook, embedded within the IOSF, includes programmable triggering and capturing logic, timestamp capability, and a security feature to disallow tracing of proprietary transactions. The fabric trace hook may operate in a lossy or lossless mode.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: December 29, 2015
    Assignee: INTEL CORPORATION
    Inventors: Ki Yoon, Robert De Gruijl, Chai Ziv, Michael Klinglesmith
  • Publication number: 20070159578
    Abstract: The present invention is related to a method of method of manufacture of a reflective polarizing film that can improve brightness of a liquid crystal display device remarkably by making a liquid crystal film that can cover visible light by using cholesteric liquid crystal layers having different selective light-reflection central wavelengths, attaching a quarter wave (¼ ?) retardation film on top of the liquid crystal film, and adding prism patterns to the opposite side of the liquid crystal film. The reflective polarizing film of the present invention is characterized by that two or more cholesteric liquid crystal layers having different selective reflection wavelength regions are laminated in order from a shorter wavelength to a longer wavelength, and brightness of a liquid crystal display device is maximized owing to an integrated film manufactured by attaching a ¼ ? retardation film onto cholesteric liquid crystal layers and forming prism patterns onto the opposite side.
    Type: Application
    Filed: March 25, 2005
    Publication date: July 12, 2007
    Applicant: SAMSUNG FINE CHEMICALS CO., LTD.
    Inventors: Sung-Tae Kim, Ki Yoon, Keon Kim, Jae Jung
  • Publication number: 20060276020
    Abstract: Embodiments are provided for a method to deposit barrier and tungsten materials on a substrate. In one embodiment, a method provides forming a barrier layer on a substrate and exposing the substrate to a silane gas to form a thin silicon-containing layer on the barrier layer during a soak process. The method further provides depositing a tungsten nucleation layer over the barrier layer and the thin silicon-containing layer during an atomic layer deposition process and depositing a tungsten bulk layer on the tungsten nucleation layer during a chemical vapor deposition process. In some examples, the barrier layer contains metallic cobalt and cobalt silicide, or metallic nickel and nickel silicide. In other examples, the barrier layer contains metallic titanium and titanium nitride, or metallic tantalum and tantalum nitride.
    Type: Application
    Filed: July 6, 2006
    Publication date: December 7, 2006
    Inventors: Ki Yoon, Yonghwa Cha, Sang Yu, Hafiz Ahmad, Ho Wee
  • Publication number: 20060239564
    Abstract: A device and method for generating a Joint Picture Experts Group (JPEG) file is capable of effectively combining image data with voice/audio data using a JPEG file format, recording and storing the combined data, easily and reproducing the image data and the voice/audio data without separate synchronization information. The device includes a voice/audio encoder, a first buffer, a JPEG encoder and a JPEG packing unit. The voice/audio encoder encodes input voice/audio data and outputs encoded voice/audio data. The first buffer stores the encoded voice/audio data. The JPEG encoder encodes input image data into JPEG image data and outputs the JPEG image data.
    Type: Application
    Filed: July 29, 2005
    Publication date: October 26, 2006
    Inventors: Hyuk Cha, Ki Yoon
  • Publication number: 20050033946
    Abstract: Techniques for control word prediction and speculative execution. In one embodiment, an apparatus includes a control word predictor, execution resources, and a comparison module. The control word predictor of this embodiment predicts a predicted control word for execution of operations in response to a control word changing operation. The execution resources of this embodiment speculatively execute the plurality of operations utilizing the predicted control word, and the comparison module determines if the predicted control word matches an actual control word set by the control word changing operation or a plurality of other control words, and to cause re-execution of said plurality of operations if said actual control word matches any of the plurality of other control words.
    Type: Application
    Filed: August 6, 2003
    Publication date: February 10, 2005
    Inventors: Mohammad Abadallah, Mitchell Diamond, David Jackson, Kip Baumann, Ki Yoon, Rafi Saied