Patents by Inventor Kibby B. Horsford
Kibby B. Horsford has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170271285Abstract: A conductive polymer-solder ball structure is provided. The conductive polymer-solder ball structure includes a wafer having at least one metal pad providing an electrical conductive path to a substrate layer, a conductive polymer pad located directly on the wafer over the at least one metal pad, an electrolessly plated layer located on a surface of the conductive polymer pad, and a solder ball located on a surface of the electrolessly plated layer.Type: ApplicationFiled: March 17, 2016Publication date: September 21, 2017Inventors: Richard S. Graf, Kibby B. Horsford, Sudeep Mandal
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Patent number: 9496234Abstract: An integrated conductive polymer-solder ball structure is provided. The integrated conductive polymer-solder ball structure comprises a sputter seed layer applied to a wafer structure, one or more conductive polymer pad structures applied to the sputtered seed layer at locations on the wafer structure where one or more solder ball structures will be formed, an electroplating layer applied to portions of the one or more conductive polymer pad structures where a photoresist layer has been exposed, and a solder ball formed on each of the electroplating layers thereby forming the one or more solder ball structures.Type: GrantFiled: June 17, 2015Date of Patent: November 15, 2016Assignee: GLOBALFOUNDRIES Inc.Inventors: Richard S. Graf, Kibby B. Horsford, Sudeep Mandal
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Patent number: 7670437Abstract: A system for of aligning a mask to a substrate comprising: a fixture for holding the mask and the substrate in fixed positions relative to each other; means for holding the substrate, the means for holding the substrate protruding through openings in a table and the fixture, the means for holding fixedly mounted on a stage, the stage moveable in first and second directions and rotatable about an axis relative to the table; means for affixing the fixture containing the mask and the substrate to the table; means for controlling the means for temporarily affixing so as to generate a uniform force around a perimeter of the fixture to effectuate the temporarily affixing; means for aligning the mask to the substrate, the means for aligning controlling movement of the stage in the first and second directions and rotation about the axis; and means for fastening the fixture together.Type: GrantFiled: May 8, 2008Date of Patent: March 2, 2010Assignee: International Business Machines CorporationInventors: Duane E. Allen, Brian K. Burnor, Thomas A. Dotolo, Leonard J. Gardecki, William L. Hammond, Kibby B. Horsford, Charles R. Ramsey
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Publication number: 20080202421Abstract: A system for of aligning a mask to a substrate comprising: a fixture for holding the mask and the substrate in fixed positions relative to each other; means for holding the substrate, the means for holding the substrate protruding through openings in a table and the fixture, the means for holding fixedly mounted on a stage, the stage moveable in first and second directions and rotatable about an axis relative to the table; means for affixing the fixture containing the mask and the substrate to the table; means for controlling the means for temporarily affixing so as to generate a uniform force around a perimeter of the fixture to effectuate the temporarily affixing; means for aligning the mask to the substrate, the means for aligning controlling movement of the stage in the first and second directions and rotation about the axis; and means for fastening the fixture together.Type: ApplicationFiled: May 8, 2008Publication date: August 28, 2008Inventors: Duane E. Allen, Brian K. Burnor, Thomas A. Dotolo, Leonard J. Gardecki, William L. Hammond, Kibby B. Horsford, Charles R. Ramsey
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Patent number: 7410919Abstract: A system for of aligning a mask to a substrate comprising: a fixture for holding the mask and the substrate in fixed positions relative to each other; means for holding the substrate, the means for holding the substrate protruding through openings in a table and the fixture, the means for holding fixedly mounted on a stage, the stage moveable in first and second directions and rotatable about an axis relative to the table; means for affixing the fixture containing the mask and the substrate to the table; means for controlling the means for temporarily affixing so as to generate a uniform force around a perimeter of the fixture to effectuate the temporarily affixing; means for aligning the mask to the substrate, the means for aligning controlling movement of the stage in the first and second directions and rotation about the axis; and means for fastening the fixture together.Type: GrantFiled: June 27, 2003Date of Patent: August 12, 2008Assignee: International Business Machines CorporationInventors: Duane E Allen, Brian K Burnor, Thomas A Dotolo, Leonard J Gardecki, William L Hammond, Kibby B Horsford, Charles R Ramsey
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Publication number: 20040261977Abstract: A system for of aligning a mask to a substrate comprising: a fixture for holding the mask and the substrate in fixed positions relative to each other; means for holding the substrate, the means for holding the substrate protruding through openings in a table and the fixture, the means for holding fixedly mounted on a stage, the stage moveable in first and second directions and rotatable about an axis relative to the table; means for affixing the fixture containing the mask and the substrate to the table; means for controlling the means for temporarily affixing so as to generate a uniform force around a perimeter of the fixture to effectuate the temporarily affixing; means for aligning the mask to the substrate, the means for aligning controlling movement of the stage in the first and second directions and rotation about the axis; and means for fastening the fixture together.Type: ApplicationFiled: June 27, 2003Publication date: December 30, 2004Applicant: International Business Machines CorporationInventors: Duane E. Allen, Brian K. Burnor, Thomas A. Dotolo, Leonard J. Gardecki, William L. Hammond, Kibby B. Horsford, Charles R. Ramsey
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Patent number: 6603195Abstract: A semiconductor module includes a semiconductor chip, a lead frame having lead fingers, and a down set member within an encapsulant for reduce warpage and providing a more planar package by balancing thermal stress between the lead fingers and the encapsulant. The down set member can be a bent portion of the lead frame. It can also be a separate body, such as a dummy semiconductor chip.Type: GrantFiled: June 28, 2000Date of Patent: August 5, 2003Assignee: International Business Machines CorporationInventors: David V. Caletka, James L. Carper, John P. Cincotta, Kibby B. Horsford, Gary H. Irish, John J. Lajza, Jr., Gordon C. Osborne, Jr., Charles R. Ramsey, Robert M. Smith, Michael J. Vadnais
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Patent number: 5528159Abstract: A method and apparatus for testing semi-conductor chips is disclosed. The individual semiconductor chips have I/O contacts. The apparatus is provided with an interposer that has contacts corresponding to the contacts on the semiconductor chip. Both the chip and the interposer contacts can be any known type including metal ball, bumps, or tabs or may be provided with dendritic surfaces. The chip contacts are first brought into relative loose temporary contact with the contacts on the interposer and then a compressive force greater that 5 grams per chip contact is applied to the chip to force the chip contacts into good electrical contact with the interposer contacts. Testing of the chip is then performed. The tests may include heating of the chip as well as the application of signals to the chip contacts. After testing the chip is removed from the substrate.Type: GrantFiled: May 30, 1995Date of Patent: June 18, 1996Assignee: International Business Machine Corp.Inventors: Richard G. Charlton, George C. Correia, Mark A. Couture, Gary R. Hill, Kibby B. Horsford, Anthony P. Ingraham, Michael D. Lowell, Voya R. Markovich, Gordon C. Osborne, Jr., Mark V. Pierson
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Patent number: 5523696Abstract: A method and apparatus for testing semi-conductor chips is disclosed. The individual semiconductor chips have I/O contacts. The apparatus is provided with an interposer that has contacts corresponding to the contacts on the semiconductor chip. Both the chip and the interposer contacts can be any known type including metal ball, bumps, or tabs or may be provided with dendritic surfaces. The chip contacts are first brought into relative loose temporary contact with the contacts on the interposer and then a compressive force greater that 5 grams per chip contact is applied to the chip to force the chip contacts into good electrical contact with the interposer contacts. Testing of the chip is then performed. The tests may include heating of the chip as well as the application of signals to the chip contacts. After testing the chip is removed from the substrate.Type: GrantFiled: December 7, 1993Date of Patent: June 4, 1996Assignee: International Business Machines Corp.Inventors: Richard G. Charlton, George C. Correla, Mark A. Couture, Gary R. Hill, Kibby B. Horsford, Anthony P. Ingraham, Michael D. Lowell, Voya R. Markovich, Gordon C. Osborne, Jr., Mark V. Pierson